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authorChee Hong Ang <chee.hong.ang@intel.com>2018-08-20 10:57:36 -0700
committerTom Rini <trini@konsulko.com>2018-11-16 13:34:34 -0500
commiteb13dddd2c0cf7e02f3cc52f783af332a64a63d2 (patch)
tree08ae684a0a0de155990f429886f7a1b5b9f87a8e /arch
parentc0f3296f831ceab12bd5cf75ed3b8638f183e117 (diff)
ARMv8: SError exception handling in PSCI exception vectors
Allow platform vendors to handle SError interrupt exceptions from ARMv8 PSCI exception vectors by overriding this weak function 'plat_error_handler'. Signed-off-by: Chee Hong Ang <chee.hong.ang@intel.com>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/cpu/armv8/psci.S26
1 files changed, 26 insertions, 0 deletions
diff --git a/arch/arm/cpu/armv8/psci.S b/arch/arm/cpu/armv8/psci.S
index 097f91bace..358df8fee9 100644
--- a/arch/arm/cpu/armv8/psci.S
+++ b/arch/arm/cpu/armv8/psci.S
@@ -236,6 +236,28 @@ handle_sync:
b unhandled_exception
+#ifdef CONFIG_ARMV8_EA_EL3_FIRST
+/*
+ * Override this function if custom error handling is
+ * needed for asynchronous aborts
+ */
+ENTRY(plat_error_handler)
+ ret
+ENDPROC(plat_error_handler)
+.weak plat_error_handler
+
+handle_error:
+ bl psci_get_cpu_id
+ bl psci_get_cpu_stack_top
+ mov x9, #1
+ msr spsel, x9
+ mov sp, x0
+
+ bl plat_error_handler /* Platform specific error handling */
+deadloop:
+ b deadloop /* Never return */
+#endif
+
.align 11
.globl el3_exception_vectors
el3_exception_vectors:
@@ -261,7 +283,11 @@ el3_exception_vectors:
.align 7
b unhandled_exception /* FIQ, Lower EL using AArch64 */
.align 7
+#ifdef CONFIG_ARMV8_EA_EL3_FIRST
+ b handle_error /* SError, Lower EL using AArch64 */
+#else
b unhandled_exception /* SError, Lower EL using AArch64 */
+#endif
.align 7
b unhandled_exception /* Sync, Lower EL using AArch32 */
.align 7