diff options
| author | Ye Li <ye.li@nxp.com> | 2022-07-26 14:49:55 +0800 |
|---|---|---|
| committer | Ye Li <ye.li@nxp.com> | 2022-07-29 10:00:01 +0800 |
| commit | e24c7e6ebe07c46b61cc0967c0292ce2cce33176 (patch) | |
| tree | c2c634816b4dc83c3446ccdbe93ead28af2aaf28 /arch | |
| parent | a357e9074134530221cdc8184addb970c5cb3aeb (diff) | |
LF-6692-1 imx8ulp: xrdc: Fix DID0 access DDR in MRC4
eDMA1 and USHDC0 access to DDR are controlled by MRC4, so must configure
the MRC4 for DID0
Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Jacky Bai <ping.bai@nxp.com>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm/mach-imx/imx8ulp/rdc.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm/mach-imx/imx8ulp/rdc.c b/arch/arm/mach-imx/imx8ulp/rdc.c index caf19357d8..b6afed90b6 100644 --- a/arch/arm/mach-imx/imx8ulp/rdc.c +++ b/arch/arm/mach-imx/imx8ulp/rdc.c @@ -278,6 +278,7 @@ void xrdc_init_mrc(void) { /* Set MRC4 and MRC5 for DDR access from A35 and AP NIC PER masters */ xrdc_config_mrc_w0_w1(4, 0, CONFIG_SYS_SDRAM_BASE, PHYS_SDRAM_SIZE); + xrdc_config_mrc_dx_perm(4, 0, 1, 1); xrdc_config_mrc_dx_perm(4, 0, 7, 1); xrdc_config_mrc_w3_w4(4, 0, 0x0, 0x80000FFF); |