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authorMarek Vasut <marex@denx.de>2019-02-13 21:50:25 +0100
committerMarek Vasut <marex@denx.de>2019-02-25 16:07:36 +0100
commitb275c9aba6d1628211287f80297048128acec964 (patch)
tree82b3c54799f2f50859512c13a961657f19022726 /arch
parent97b262758b7c99a644155254bee9f716573b10ac (diff)
ARM: cache: Fix incorrect bitwise operation
The loop implemented in the code is supposed to check whether the PL310 operation register has any bit from the mask set. Currently, the code checks whether the PL310 operation register has any bit set AND whether the mask is non-zero, which is incorrect. Fix the conditional. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Dalon Westergreen <dwesterg@gmail.com> Cc: Dinh Nguyen <dinguyen@kernel.org> Cc: Tom Rini <trini@konsulko.com> Fixes: 93bc21930a1b ("armv7: add PL310 support to u-boot")
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/lib/cache-pl310.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/lib/cache-pl310.c b/arch/arm/lib/cache-pl310.c
index 1296ba6efda..bbaaaa4157a 100644
--- a/arch/arm/lib/cache-pl310.c
+++ b/arch/arm/lib/cache-pl310.c
@@ -33,7 +33,7 @@ static void pl310_background_op_all_ways(u32 *op_reg)
/* Invalidate all ways */
writel(way_mask, op_reg);
/* Wait for all ways to be invalidated */
- while (readl(op_reg) && way_mask)
+ while (readl(op_reg) & way_mask)
;
pl310_cache_sync();
}