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authorEran Matityahu <eran.m@variscite.com>2017-12-14 20:20:02 +0200
committerStefano Babic <sbabic@denx.de>2018-01-03 14:01:38 +0100
commitaf104ae5b87c8efb107ac282d09927d8346dc94f (patch)
treedb68d12e56ed3dc249d179941149d5ad9f76c8a1 /arch
parentbaefb63a13d106458577704ca4586b3f414c9520 (diff)
imx: spl: Fix NAND bootmode detection
commit 20f14714169 ("imx: spl: Update NAND bootmode detection bit") broke the NAND bootmode detection by checking if BOOT_CFG1[7:4] == 0x8 for NAND boot mode. This commit essentially reverts it, while using the IMX6_BMODE_* macros that were introduced since. Tables 8-7 & 8-10 from IMX6DQRM say the NAND boot mode selection is done when BOOT_CFG1[7] is 1, but BOOT_CFG1[6:4] is not necessarily 0x0 in this case. Actually, NAND boot mode is when 0x8 <= BOOT_CFG1[7:4] <= 0xf, like it was in the code before. Signed-off-by: Eran Matityahu <eran.m@variscite.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Jagan Teki <jagan@openedev.com> Cc: Tim Harvey <tharvey@gateworks.com>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/include/asm/mach-imx/sys_proto.h3
-rw-r--r--arch/arm/mach-imx/spl.c2
2 files changed, 3 insertions, 2 deletions
diff --git a/arch/arm/include/asm/mach-imx/sys_proto.h b/arch/arm/include/asm/mach-imx/sys_proto.h
index 5184e00972..d518e03809 100644
--- a/arch/arm/include/asm/mach-imx/sys_proto.h
+++ b/arch/arm/include/asm/mach-imx/sys_proto.h
@@ -81,7 +81,8 @@ enum imx6_bmode {
IMX6_BMODE_ESD,
IMX6_BMODE_MMC,
IMX6_BMODE_EMMC,
- IMX6_BMODE_NAND,
+ IMX6_BMODE_NAND_MIN,
+ IMX6_BMODE_NAND_MAX = 0xf,
};
static inline u8 imx6_is_bmode_from_gpr9(void)
diff --git a/arch/arm/mach-imx/spl.c b/arch/arm/mach-imx/spl.c
index d0d1b73aa6..723f51fad3 100644
--- a/arch/arm/mach-imx/spl.c
+++ b/arch/arm/mach-imx/spl.c
@@ -91,7 +91,7 @@ u32 spl_boot_device(void)
case IMX6_BMODE_EMMC:
return BOOT_DEVICE_MMC1;
/* NAND Flash: 8.5.2, Table 8-10 */
- case IMX6_BMODE_NAND:
+ case IMX6_BMODE_NAND_MIN ... IMX6_BMODE_NAND_MAX:
return BOOT_DEVICE_NAND;
}
return BOOT_DEVICE_NONE;