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authorKurt Miller <kurt@intricatesoftware.com>2020-05-13 15:55:20 -0400
committerKever Yang <kever.yang@rock-chips.com>2020-05-22 20:53:20 +0800
commit33863f744d513f5c16a254870e7b3cef8580bbc9 (patch)
treed2f5f10b6846bcbcbb75aa61927112eee02a7e8f /arch
parent5e50f8787cefd7f35f8d33983876d56d1dc5463a (diff)
rockchip: rk3328: rock64 - fix gen3 SPL hang
Use the same approach as ROC-RK3328-CC which enables SPL GPIO, pinctl and regulator support. This allows the gen3 board to boot through SPL and does not break gen2 in the process. Signed-off-by: Kurt Miller <kurt@intricatesoftware.com> Acked-by: Matwey V. Kornilov <matwey.kornilov@gmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/dts/rk3328-rock64-u-boot.dtsi21
1 files changed, 21 insertions, 0 deletions
diff --git a/arch/arm/dts/rk3328-rock64-u-boot.dtsi b/arch/arm/dts/rk3328-rock64-u-boot.dtsi
index 8318bf4e60..f076075076 100644
--- a/arch/arm/dts/rk3328-rock64-u-boot.dtsi
+++ b/arch/arm/dts/rk3328-rock64-u-boot.dtsi
@@ -11,6 +11,22 @@
};
};
+&gpio0 {
+ u-boot,dm-spl;
+};
+
+&pinctrl {
+ u-boot,dm-spl;
+};
+
+&sdmmc0m1_gpio {
+ u-boot,dm-spl;
+};
+
+&pcfg_pull_up_4ma {
+ u-boot,dm-spl;
+};
+
&usb_host0_xhci {
vbus-supply = <&vcc_host_5v>;
status = "okay";
@@ -25,3 +41,8 @@
/delete-property/ regulator-always-on;
/delete-property/ regulator-boot-on;
};
+
+/* Need this and all the pinctrl/gpio stuff above to set pinmux */
+&vcc_sd {
+ u-boot,dm-spl;
+};