clk: Add MPC83xx clock driver

Add a clock driver for the MPC83xx architecture.

Signed-off-by: Mario Six <mario.six@gdsys.cc>

4 files changed, 83 insertions, 1 deletions

diff --git a/arch/powerpc/cpu/mpc83xx/speed.c b/arch/powerpc/cpu/mpc83xx/speed.c
index f0945281cd..39bc1c5340 100644
--- a/arch/powerpc/cpu/mpc83xx/speed.c
+++ b/arch/powerpc/cpu/mpc83xx/speed.c
@@ -6,6 +6,8 @@
  * Copyright (C) 2004-2007 Freescale Semiconductor, Inc.
  */
 
+#ifndef CONFIG_CLK_MPC83XX
+
 #include <common.h>
 #include <mpc83xx.h>
 #include <command.h>
@@ -590,3 +592,5 @@ U_BOOT_CMD(clocks, 1, 0, do_clocks,
 	"print clock configuration",
 	"    clocks"
 );
+
+#endif
diff --git a/arch/powerpc/include/asm/arch-mpc83xx/soc.h b/arch/powerpc/include/asm/arch-mpc83xx/soc.h
new file mode 100644
index 0000000000..39bf7d5a7f
--- /dev/null
+++ b/arch/powerpc/include/asm/arch-mpc83xx/soc.h
@@ -0,0 +1,74 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * (C) Copyright 2018
+ * Mario Six, Guntermann & Drunck GmbH, mario.six@gdsys.cc
+ */
+
+#ifndef _MPC83XX_SOC_H_
+#define _MPC83XX_SOC_H_
+
+enum soc_type {
+	SOC_MPC8308,
+	SOC_MPC8309,
+	SOC_MPC8313,
+	SOC_MPC8315,
+	SOC_MPC832X,
+	SOC_MPC8349,
+	SOC_MPC8360,
+	SOC_MPC8379,
+};
+
+bool mpc83xx_has_sdhc(int type)
+{
+	return (type == SOC_MPC8308) ||
+	       (type == SOC_MPC8309) ||
+	       (type == SOC_MPC8379);
+}
+
+bool mpc83xx_has_tsec(int type)
+{
+	return (type == SOC_MPC8308) ||
+	       (type == SOC_MPC8313) ||
+	       (type == SOC_MPC8315) ||
+	       (type == SOC_MPC8349) ||
+	       (type == SOC_MPC8379);
+}
+
+bool mpc83xx_has_pcie1(int type)
+{
+	return (type == SOC_MPC8308) ||
+	       (type == SOC_MPC8315) ||
+	       (type == SOC_MPC8379);
+}
+
+bool mpc83xx_has_pcie2(int type)
+{
+	return (type == SOC_MPC8315) ||
+	       (type == SOC_MPC8379);
+}
+
+bool mpc83xx_has_sata(int type)
+{
+	return (type == SOC_MPC8315) ||
+	       (type == SOC_MPC8379);
+}
+
+bool mpc83xx_has_pci(int type)
+{
+	return type != SOC_MPC8308;
+}
+
+bool mpc83xx_has_second_i2c(int type)
+{
+	return (type != SOC_MPC8315) &&
+	       (type != SOC_MPC832X);
+}
+
+bool mpc83xx_has_quicc_engine(int type)
+{
+	return (type == SOC_MPC8309) ||
+	       (type == SOC_MPC832X) ||
+	       (type == SOC_MPC8360);
+}
+
+#endif /* _MPC83XX_SOC_H_ */
diff --git a/arch/powerpc/include/asm/config.h b/arch/powerpc/include/asm/config.h
index bf11f40e23..849a69aced 100644
--- a/arch/powerpc/include/asm/config.h
+++ b/arch/powerpc/include/asm/config.h
@@ -75,7 +75,7 @@
 /* All PPC boards must swap IDE bytes */
 #define CONFIG_IDE_SWAP_IO
 
-#if defined(CONFIG_DM_SERIAL)
+#if defined(CONFIG_DM_SERIAL) && !defined(CONFIG_CLK_MPC83XX)
 /*
  * TODO: Convert this to a clock driver exists that can give us the UART
  * clock here.
diff --git a/arch/powerpc/include/asm/global_data.h b/arch/powerpc/include/asm/global_data.h
index 07d5beaf0e..d00cee95fb 100644
--- a/arch/powerpc/include/asm/global_data.h
+++ b/arch/powerpc/include/asm/global_data.h
@@ -30,6 +30,9 @@ struct arch_global_data {
 #endif
 	/* TODO: sjg@chromium.org: Should these be unslgned long? */
 #if defined(CONFIG_MPC83xx)
+#ifdef CONFIG_CLK_MPC83XX
+	u32 core_clk;
+#else
 	/* There are other clocks in the MPC83XX */
 	u32 csb_clk;
 # if defined(CONFIG_MPC8308) || defined(CONFIG_MPC831x) || \
@@ -62,6 +65,7 @@ struct arch_global_data {
 	u32 mem_sec_clk;
 # endif /* CONFIG_MPC8360 */
 #endif
+#endif
 #if defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx)
 	u32 lbc_clk;
 	void *cpu;