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authorMario Six <mario.six@gdsys.cc>2019-01-21 09:18:20 +0100
committerMario Six <mario.six@gdsys.cc>2019-05-21 07:52:34 +0200
commit1e718f43de1bee73fe727597101865f81ff873f5 (patch)
tree8d0072f93611aac314bf5dea3dc452de96ca8a91 /arch
parent8835836ae74d1b340f079ce49c3f1cc810452d0d (diff)
mpc83xx: Replace ppcDWstore with inline assembly
ppcDWstore/ppcDWload are hardly used by any board, but since they're implemented in start.S, they're always present in every U-Boot image, even if they're not needed. Re-implement these fuctions in C with inline assembly, so that the compiler can decide when to actually include them. Signed-off-by: Mario Six <mario.six@gdsys.cc>
Diffstat (limited to 'arch')
-rw-r--r--arch/powerpc/cpu/mpc83xx/cpu.c18
-rw-r--r--arch/powerpc/cpu/mpc83xx/start.S12
2 files changed, 18 insertions, 12 deletions
diff --git a/arch/powerpc/cpu/mpc83xx/cpu.c b/arch/powerpc/cpu/mpc83xx/cpu.c
index 4ea4249aff..9c67099a17 100644
--- a/arch/powerpc/cpu/mpc83xx/cpu.c
+++ b/arch/powerpc/cpu/mpc83xx/cpu.c
@@ -229,3 +229,21 @@ int cpu_mmc_init(bd_t *bis)
return 0;
#endif
}
+
+void ppcDWstore(unsigned int *addr, unsigned int *value)
+{
+ asm("lfd 1, 0(%1)\n\t"
+ "stfd 1, 0(%0)"
+ :
+ : "r" (addr), "r" (value)
+ : "memory");
+}
+
+void ppcDWload(unsigned int *addr, unsigned int *ret)
+{
+ asm("lfd 1, 0(%0)\n\t"
+ "stfd 1, 0(%1)"
+ :
+ : "r" (addr), "r" (ret)
+ : "memory");
+}
diff --git a/arch/powerpc/cpu/mpc83xx/start.S b/arch/powerpc/cpu/mpc83xx/start.S
index 9fbbf59ce2..f4a8a766c3 100644
--- a/arch/powerpc/cpu/mpc83xx/start.S
+++ b/arch/powerpc/cpu/mpc83xx/start.S
@@ -119,18 +119,6 @@ disable_addr_trans:
mtspr SRR1, r3
rfi
- .globl ppcDWstore
-ppcDWstore:
- lfd 1, 0(r4)
- stfd 1, 0(r3)
- blr
-
- .globl ppcDWload
-ppcDWload:
- lfd 1, 0(r3)
- stfd 1, 0(r4)
- blr
-
#ifndef CONFIG_DEFAULT_IMMR
#error CONFIG_DEFAULT_IMMR must be defined
#endif /* CONFIG_DEFAULT_IMMR */