summaryrefslogtreecommitdiff
path: root/arch
diff options
context:
space:
mode:
authorSimon Glass <sjg@chromium.org>2016-06-19 19:43:05 -0600
committerTom Rini <trini@konsulko.com>2016-07-14 18:33:11 -0400
commitbcc53bf095893fbdae531a9a7b5d4ef4a125a7fc (patch)
treebd69dffff5187ec71ed5597398d55b87a13e23ac /arch
parent982868264e7c61964bd392b10b2370f6757b14dc (diff)
arm: Show cache warnings in U-Boot proper only
Avoid bloating the SPL image size. Signed-off-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/lib/cache.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm/lib/cache.c b/arch/arm/lib/cache.c
index 642a95242b3..d330b09434a 100644
--- a/arch/arm/lib/cache.c
+++ b/arch/arm/lib/cache.c
@@ -61,8 +61,8 @@ int check_cache_range(unsigned long start, unsigned long stop)
ok = 0;
if (!ok) {
- debug("CACHE: Misaligned operation at range [%08lx, %08lx]\n",
- start, stop);
+ warn_non_spl("CACHE: Misaligned operation at range [%08lx, %08lx]\n",
+ start, stop);
}
return ok;