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authorAlbert ARIBAUD <albert.u.boot@aribaud.net>2014-10-10 08:56:01 +0200
committerAlbert ARIBAUD <albert.u.boot@aribaud.net>2014-10-10 08:56:01 +0200
commitebf8644a113a36b163c2e06fe1e081c73f563c3a (patch)
treebdb14d7e33d6c2d1b7a803508e0f45eef301fb7a /arch
parent7d2f669b94aa42579b5d5775dfb076bce0102e3f (diff)
parentb219773957d2ee8fedb56f0fcb19288eb72d4867 (diff)
Merge branch 'u-boot-samsung/master' into 'u-boot-arm/master'
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/Kconfig13
-rw-r--r--arch/arm/cpu/armv7/exynos/Kconfig1
-rw-r--r--arch/arm/cpu/armv7/s5pc1xx/Kconfig25
-rw-r--r--arch/arm/cpu/armv7/s5pc1xx/cache.S30
-rw-r--r--arch/arm/cpu/armv7/s5pc1xx/cache.c47
-rw-r--r--arch/arm/dts/Makefile3
-rw-r--r--arch/arm/dts/exynos4210-smdkv310.dts21
-rw-r--r--arch/arm/dts/exynos5420-peach-pit.dts57
-rw-r--r--arch/arm/dts/s5pc1xx-goni.dts28
-rw-r--r--arch/arm/dts/s5pc1xx-smdkc100.dts29
-rw-r--r--arch/arm/include/asm/arch-s5pc1xx/periph.h61
-rw-r--r--arch/arm/include/asm/arch-s5pc1xx/pinmux.h50
12 files changed, 326 insertions, 39 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 7365fca526..72558b8562 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -336,6 +336,9 @@ config TARGET_BCM958622HR
config ARCH_EXYNOS
bool "Samsung EXYNOS"
+config ARCH_S5PC1XX
+ bool "Samsung S5PC1XX"
+
config ARCH_HIGHBANK
bool "Calxeda Highbank"
@@ -432,12 +435,6 @@ config RMOBILE
config TARGET_CM_FX6
bool "Support cm_fx6"
-config TARGET_S5P_GONI
- bool "Support s5p_goni"
-
-config TARGET_SMDKC100
- bool "Support smdkc100"
-
config TARGET_SOCFPGA_CYCLONE5
bool "Support socfpga_cyclone5"
@@ -553,6 +550,8 @@ source "arch/arm/cpu/arm926ejs/orion5x/Kconfig"
source "arch/arm/cpu/armv7/rmobile/Kconfig"
+source "arch/arm/cpu/armv7/s5pc1xx/Kconfig"
+
source "arch/arm/cpu/armv7/tegra-common/Kconfig"
source "arch/arm/cpu/armv7/uniphier/Kconfig"
@@ -661,9 +660,7 @@ source "board/raspberrypi/rpi_b/Kconfig"
source "board/ronetix/pm9261/Kconfig"
source "board/ronetix/pm9263/Kconfig"
source "board/ronetix/pm9g45/Kconfig"
-source "board/samsung/goni/Kconfig"
source "board/samsung/smdk2410/Kconfig"
-source "board/samsung/smdkc100/Kconfig"
source "board/sandisk/sansa_fuze_plus/Kconfig"
source "board/scb9328/Kconfig"
source "board/schulercontrol/sc_sps_1/Kconfig"
diff --git a/arch/arm/cpu/armv7/exynos/Kconfig b/arch/arm/cpu/armv7/exynos/Kconfig
index e7c93d8c1f..7a0d182e5f 100644
--- a/arch/arm/cpu/armv7/exynos/Kconfig
+++ b/arch/arm/cpu/armv7/exynos/Kconfig
@@ -5,6 +5,7 @@ choice
config TARGET_SMDKV310
bool "Exynos4210 SMDKV310 board"
+ select OF_CONTROL if !SPL_BUILD
config TARGET_TRATS
bool "Exynos4210 Trats board"
diff --git a/arch/arm/cpu/armv7/s5pc1xx/Kconfig b/arch/arm/cpu/armv7/s5pc1xx/Kconfig
new file mode 100644
index 0000000000..2fbbc18203
--- /dev/null
+++ b/arch/arm/cpu/armv7/s5pc1xx/Kconfig
@@ -0,0 +1,25 @@
+if ARCH_S5PC1XX
+
+choice
+ prompt "S5PC1XX board select"
+
+config TARGET_S5P_GONI
+ bool "S5P Goni board"
+ select OF_CONTROL if !SPL_BUILD
+
+config TARGET_SMDKC100
+ bool "Support smdkc100 board"
+ select OF_CONTROL if !SPL_BUILD
+
+endchoice
+
+config SYS_CPU
+ default "armv7"
+
+config SYS_SOC
+ default "s5pc1xx"
+
+source "board/samsung/goni/Kconfig"
+source "board/samsung/smdkc100/Kconfig"
+
+endif
diff --git a/arch/arm/cpu/armv7/s5pc1xx/cache.S b/arch/arm/cpu/armv7/s5pc1xx/cache.S
deleted file mode 100644
index 3089592eb1..0000000000
--- a/arch/arm/cpu/armv7/s5pc1xx/cache.S
+++ /dev/null
@@ -1,30 +0,0 @@
-/*
- * Copyright (C) 2009 Samsung Electronics
- * Minkyu Kang <mk7.kang@samsung.com>
- *
- * based on arch/arm/cpu/armv7/omap3/cache.S
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-.align 5
-
-#include <linux/linkage.h>
-
-#ifndef CONFIG_SYS_L2CACHE_OFF
-ENTRY(v7_outer_cache_enable)
- push {r0, r1, r2, lr}
- mrc 15, 0, r3, cr1, cr0, 1
- orr r3, r3, #2
- mcr 15, 0, r3, cr1, cr0, 1
- pop {r1, r2, r3, pc}
-ENDPROC(v7_outer_cache_enable)
-
-ENTRY(v7_outer_cache_disable)
- push {r0, r1, r2, lr}
- mrc 15, 0, r3, cr1, cr0, 1
- bic r3, r3, #2
- mcr 15, 0, r3, cr1, cr0, 1
- pop {r1, r2, r3, pc}
-ENDPROC(v7_outer_cache_disable)
-#endif
diff --git a/arch/arm/cpu/armv7/s5pc1xx/cache.c b/arch/arm/cpu/armv7/s5pc1xx/cache.c
new file mode 100644
index 0000000000..51af2990c2
--- /dev/null
+++ b/arch/arm/cpu/armv7/s5pc1xx/cache.c
@@ -0,0 +1,47 @@
+/*
+ * Copyright (C) 2014 Samsung Electronics
+ * Minkyu Kang <mk7.kang@samsung.com>
+ * Robert Baldyga <r.baldyga@samsung.com>
+ *
+ * based on arch/arm/cpu/armv7/omap3/cache.S
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+
+#ifndef CONFIG_SYS_DCACHE_OFF
+void enable_caches(void)
+{
+ dcache_enable();
+}
+
+void disable_caches(void)
+{
+ dcache_disable();
+}
+#endif
+
+#ifndef CONFIG_SYS_L2CACHE_OFF
+void v7_outer_cache_enable(void)
+{
+ __asm(
+ "push {r0, r1, r2, lr}\n\t"
+ "mrc 15, 0, r3, cr1, cr0, 1\n\t"
+ "orr r3, r3, #2\n\t"
+ "mcr 15, 0, r3, cr1, cr0, 1\n\t"
+ "pop {r1, r2, r3, pc}"
+ );
+}
+
+void v7_outer_cache_disable(void)
+{
+ __asm(
+ "push {r0, r1, r2, lr}\n\t"
+ "mrc 15, 0, r3, cr1, cr0, 1\n\t"
+ "bic r3, r3, #2\n\t"
+ "mcr 15, 0, r3, cr1, cr0, 1\n\t"
+ "pop {r1, r2, r3, pc}"
+ );
+}
+#endif
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 5f2b946fdd..c37580ed84 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -1,4 +1,7 @@
+dtb-$(CONFIG_S5PC100) += s5pc1xx-smdkc100.dtb
+dtb-$(CONFIG_S5PC110) += s5pc1xx-goni.dtb
dtb-$(CONFIG_EXYNOS4) += exynos4210-origen.dtb \
+ exynos4210-smdkv310.dtb \
exynos4210-universal_c210.dtb \
exynos4210-trats.dtb \
exynos4412-trats2.dtb \
diff --git a/arch/arm/dts/exynos4210-smdkv310.dts b/arch/arm/dts/exynos4210-smdkv310.dts
new file mode 100644
index 0000000000..c390c8f0c8
--- /dev/null
+++ b/arch/arm/dts/exynos4210-smdkv310.dts
@@ -0,0 +1,21 @@
+/*
+ * Samsung's Exynos4210-based SMDKV310 board device tree source
+ *
+ * Copyright (c) 2014 Google, Inc
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+/dts-v1/;
+/include/ "exynos4.dtsi"
+
+/ {
+ model = "Samsung SMDKV310 on Exynos4210";
+ compatible = "samsung,smdkv310", "samsung,exynos4210";
+
+ aliases {
+ serial0 = "/serial@13800000";
+ console = "/serial@13820000";
+ };
+
+};
diff --git a/arch/arm/dts/exynos5420-peach-pit.dts b/arch/arm/dts/exynos5420-peach-pit.dts
index 3ed70a8a92..995e62b337 100644
--- a/arch/arm/dts/exynos5420-peach-pit.dts
+++ b/arch/arm/dts/exynos5420-peach-pit.dts
@@ -28,11 +28,66 @@
pmic = "/i2c@12ca0000";
};
+ cros-ec-keyb {
+ compatible = "google,cros-ec-keyb";
+ google,key-rows = <8>;
+ google,key-columns = <13>;
+ google,repeat-delay-ms = <240>;
+ google,repeat-rate-ms = <30>;
+ google,ghost-filter;
+ /*
+ * Keymap entries take the form of 0xRRCCKKKK where
+ * RR=Row CC=Column KKKK=Key Code
+ * The values below are for a US keyboard layout and
+ * are taken from the Linux driver. Note that the
+ * 102ND key is not used for US keyboards.
+ */
+ linux,keymap = <
+ /* CAPSLCK F1 B F10 */
+ 0x0001003a 0x0002003b 0x00030030 0x00040044
+ /* N = R_ALT ESC */
+ 0x00060031 0x0008000d 0x000a0064 0x01010001
+ /* F4 G F7 H */
+ 0x0102003e 0x01030022 0x01040041 0x01060023
+ /* ' F9 BKSPACE L_CTRL */
+ 0x01080028 0x01090043 0x010b000e 0x0200001d
+ /* TAB F3 T F6 */
+ 0x0201000f 0x0202003d 0x02030014 0x02040040
+ /* ] Y 102ND [ */
+ 0x0205001b 0x02060015 0x02070056 0x0208001a
+ /* F8 GRAVE F2 5 */
+ 0x02090042 0x03010029 0x0302003c 0x03030006
+ /* F5 6 - \ */
+ 0x0304003f 0x03060007 0x0308000c 0x030b002b
+ /* R_CTRL A D F */
+ 0x04000061 0x0401001e 0x04020020 0x04030021
+ /* S K J ; */
+ 0x0404001f 0x04050025 0x04060024 0x04080027
+ /* L ENTER Z C */
+ 0x04090026 0x040b001c 0x0501002c 0x0502002e
+ /* V X , M */
+ 0x0503002f 0x0504002d 0x05050033 0x05060032
+ /* L_SHIFT / . SPACE */
+ 0x0507002a 0x05080035 0x05090034 0x050B0039
+ /* 1 3 4 2 */
+ 0x06010002 0x06020004 0x06030005 0x06040003
+ /* 8 7 0 9 */
+ 0x06050009 0x06060008 0x0608000b 0x0609000a
+ /* L_ALT DOWN RIGHT Q */
+ 0x060a0038 0x060b006c 0x060c006a 0x07010010
+ /* E R W I */
+ 0x07020012 0x07030013 0x07040011 0x07050017
+ /* U R_SHIFT P O */
+ 0x07060016 0x07070036 0x07080019 0x07090018
+ /* UP LEFT */
+ 0x070b0067 0x070c0069>;
+ };
+
dmc {
mem-manuf = "samsung";
mem-type = "ddr3";
clock-frequency = <800000000>;
- arm-frequency = <1700000000>;
+ arm-frequency = <900000000>;
};
tmu@10060000 {
diff --git a/arch/arm/dts/s5pc1xx-goni.dts b/arch/arm/dts/s5pc1xx-goni.dts
new file mode 100644
index 0000000000..2e671bbf7e
--- /dev/null
+++ b/arch/arm/dts/s5pc1xx-goni.dts
@@ -0,0 +1,28 @@
+/*
+ * Samsung's S5PC110-based Goni board device tree source
+ *
+ * Copyright (c) 2014 Google, Inc
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+/dts-v1/;
+
+#include "skeleton.dtsi"
+
+/ {
+ model = "Samsung Goni based on S5PC110";
+ compatible = "samsung,goni", "samsung,s5pc110";
+
+ aliases {
+ serial2 = "/serial@e2900800";
+ console = "/serial@e2900800";
+ };
+
+ serial@e2900800 {
+ compatible = "samsung,exynos4210-uart";
+ reg = <0xe2900800 0x400>;
+ id = <2>;
+ };
+
+};
diff --git a/arch/arm/dts/s5pc1xx-smdkc100.dts b/arch/arm/dts/s5pc1xx-smdkc100.dts
new file mode 100644
index 0000000000..42754ce811
--- /dev/null
+++ b/arch/arm/dts/s5pc1xx-smdkc100.dts
@@ -0,0 +1,29 @@
+/*
+ * Samsung's Exynos4210-based SMDKV310 board device tree source
+ *
+ * Copyright (c) 2014 Google, Inc
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+/dts-v1/;
+
+#include "skeleton.dtsi"
+
+/ {
+ model = "Samsung SMDKC100 based on S5PC100";
+ compatible = "samsung,smdkc100", "samsung,s5pc100";
+
+ aliases {
+ serial0 = "/serial@ec000000";
+ console = "/serial@ec000000";
+ };
+
+ serial@ec000000 {
+ compatible = "samsung,exynos4210-uart";
+ reg = <0xec000000 0x100>;
+ interrupts = <0 51 0>;
+ id = <0>;
+ };
+
+};
diff --git a/arch/arm/include/asm/arch-s5pc1xx/periph.h b/arch/arm/include/asm/arch-s5pc1xx/periph.h
new file mode 100644
index 0000000000..5c1c3d4a93
--- /dev/null
+++ b/arch/arm/include/asm/arch-s5pc1xx/periph.h
@@ -0,0 +1,61 @@
+/*
+ * Copyright (C) 2012 Samsung Electronics
+ * Rajeshwari Shinde <rajeshwari.s@samsung.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#ifndef __ASM_ARM_ARCH_PERIPH_H
+#define __ASM_ARM_ARCH_PERIPH_H
+
+/*
+ * Peripherals required for pinmux configuration. List will
+ * grow with support for more devices getting added.
+ * Numbering based on interrupt table.
+ *
+ */
+enum periph_id {
+ PERIPH_ID_UART0 = 51,
+ PERIPH_ID_UART1,
+ PERIPH_ID_UART2,
+ PERIPH_ID_UART3,
+ PERIPH_ID_I2C0 = 56,
+ PERIPH_ID_I2C1,
+ PERIPH_ID_I2C2,
+ PERIPH_ID_I2C3,
+ PERIPH_ID_I2C4,
+ PERIPH_ID_I2C5,
+ PERIPH_ID_I2C6,
+ PERIPH_ID_I2C7,
+ PERIPH_ID_SPI0 = 68,
+ PERIPH_ID_SPI1,
+ PERIPH_ID_SPI2,
+ PERIPH_ID_SDMMC0 = 75,
+ PERIPH_ID_SDMMC1,
+ PERIPH_ID_SDMMC2,
+ PERIPH_ID_SDMMC3,
+ PERIPH_ID_I2C8 = 87,
+ PERIPH_ID_I2C9,
+ PERIPH_ID_I2S0 = 98,
+ PERIPH_ID_I2S1 = 99,
+
+ /* Since following peripherals do
+ * not have shared peripheral interrupts (SPIs)
+ * they are numbered arbitiraly after the maximum
+ * SPIs Exynos has (128)
+ */
+ PERIPH_ID_SROMC = 128,
+ PERIPH_ID_SPI3,
+ PERIPH_ID_SPI4,
+ PERIPH_ID_SDMMC4,
+ PERIPH_ID_PWM0,
+ PERIPH_ID_PWM1,
+ PERIPH_ID_PWM2,
+ PERIPH_ID_PWM3,
+ PERIPH_ID_PWM4,
+ PERIPH_ID_I2C10 = 203,
+
+ PERIPH_ID_NONE = -1,
+};
+
+#endif /* __ASM_ARM_ARCH_PERIPH_H */
diff --git a/arch/arm/include/asm/arch-s5pc1xx/pinmux.h b/arch/arm/include/asm/arch-s5pc1xx/pinmux.h
new file mode 100644
index 0000000000..0b91ef658c
--- /dev/null
+++ b/arch/arm/include/asm/arch-s5pc1xx/pinmux.h
@@ -0,0 +1,50 @@
+/*
+ * Copyright (C) 2012 Samsung Electronics
+ * Abhilash Kesavan <a.kesavan@samsung.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#ifndef __ASM_ARM_ARCH_PINMUX_H
+#define __ASM_ARM_ARCH_PINMUX_H
+
+#include "periph.h"
+
+/*
+ * Flags for setting specific configarations of peripherals.
+ * List will grow with support for more devices getting added.
+ */
+enum {
+ PINMUX_FLAG_NONE = 0x00000000,
+
+ /* Flags for eMMC */
+ PINMUX_FLAG_8BIT_MODE = 1 << 0, /* SDMMC 8-bit mode */
+
+ /* Flags for SROM controller */
+ PINMUX_FLAG_BANK = 3 << 0, /* bank number (0-3) */
+ PINMUX_FLAG_16BIT = 1 << 2, /* 16-bit width */
+};
+
+/**
+ * Configures the pinmux for a particular peripheral.
+ *
+ * Each gpio can be configured in many different ways (4 bits on exynos)
+ * such as "input", "output", "special function", "external interrupt"
+ * etc. This function will configure the peripheral pinmux along with
+ * pull-up/down and drive strength.
+ *
+ * @param peripheral peripheral to be configured
+ * @param flags configure flags
+ * @return 0 if ok, -1 on error (e.g. unsupported peripheral)
+ */
+int exynos_pinmux_config(int peripheral, int flags);
+
+/**
+ * Decode the peripheral id using the interrpt numbers.
+ *
+ * @param blob Device tree blob
+ * @param node FDT I2C node to find
+ * @return peripheral id if ok, PERIPH_ID_NONE on error
+ */
+int pinmux_decode_periph_id(const void *blob, int node);
+#endif