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authorGraeme Russ <graeme.russ@gmail.com>2011-11-08 02:33:22 +0000
committerGraeme Russ <graeme.russ@gmail.com>2011-11-29 21:10:08 +1100
commit1cfcf0370132315d6eee375afdf7207ff60a07e0 (patch)
treea8be41d0ed86376fb1cc9d35dc103f3120f52502 /arch
parent303418cc97c0922cdbbc328e6d9111bd9a84d1c7 (diff)
x86: Misc PCI touchups
Signed-off-by: Graeme Russ <graeme.russ@gmail.com>
Diffstat (limited to 'arch')
-rw-r--r--arch/x86/cpu/sc520/sc520_pci.c4
-rw-r--r--arch/x86/include/asm/pci.h2
-rw-r--r--arch/x86/lib/pci_type1.c10
3 files changed, 9 insertions, 7 deletions
diff --git a/arch/x86/cpu/sc520/sc520_pci.c b/arch/x86/cpu/sc520/sc520_pci.c
index a13798f1f7..52d07c119a 100644
--- a/arch/x86/cpu/sc520/sc520_pci.c
+++ b/arch/x86/cpu/sc520/sc520_pci.c
@@ -130,9 +130,7 @@ void pci_sc520_init(struct pci_controller *hose)
hose->last_busno = 0xff;
hose->region_count = pci_set_regions(hose);
- pci_setup_type1(hose,
- SC520_REG_ADDR,
- SC520_REG_DATA);
+ pci_setup_type1(hose);
pci_register_hose(hose);
diff --git a/arch/x86/include/asm/pci.h b/arch/x86/include/asm/pci.h
index c09078eb82..37cc7e3a0f 100644
--- a/arch/x86/include/asm/pci.h
+++ b/arch/x86/include/asm/pci.h
@@ -29,7 +29,7 @@
#define DEFINE_PCI_DEVICE_TABLE(_table) \
const struct pci_device_id _table[]
-void pci_setup_type1(struct pci_controller* hose, u32 cfg_addr, u32 cfg_data);
+void pci_setup_type1(struct pci_controller *hose);
int pci_enable_legacy_video_ports(struct pci_controller* hose);
int pci_shadow_rom(pci_dev_t dev, unsigned char *dest);
void pci_remove_rom_window(struct pci_controller* hose, u32 addr);
diff --git a/arch/x86/lib/pci_type1.c b/arch/x86/lib/pci_type1.c
index 6fc4df47d3..a25fa051d5 100644
--- a/arch/x86/lib/pci_type1.c
+++ b/arch/x86/lib/pci_type1.c
@@ -50,7 +50,11 @@ TYPE1_PCI_OP(write, byte, u8, outb, 3)
TYPE1_PCI_OP(write, word, u16, outw, 2)
TYPE1_PCI_OP(write, dword, u32, outl, 0)
-void pci_setup_type1(struct pci_controller *hose, u32 cfg_addr, u32 cfg_data)
+/* bus mapping constants (used for PCI core initialization) */
+#define PCI_REG_ADDR 0x00000cf8
+#define PCI_REG_DATA 0x00000cfc
+
+void pci_setup_type1(struct pci_controller *hose)
{
pci_set_ops(hose,
type1_read_config_byte,
@@ -60,6 +64,6 @@ void pci_setup_type1(struct pci_controller *hose, u32 cfg_addr, u32 cfg_data)
type1_write_config_word,
type1_write_config_dword);
- hose->cfg_addr = (unsigned int *)cfg_addr;
- hose->cfg_data = (unsigned char *)cfg_data;
+ hose->cfg_addr = (unsigned int *)PCI_REG_ADDR;
+ hose->cfg_data = (unsigned char *)PCI_REG_DATA;
}