diff options
author | Guillaume GARDET <guillaume.gardet@free.fr> | 2019-01-04 09:23:19 +0100 |
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committer | Minkyu Kang <mk7.kang@samsung.com> | 2019-01-04 17:28:50 +0900 |
commit | df1ff4d6ba591a5fcb9549e895b23c781d8fda6d (patch) | |
tree | 63bc8920b14b65247407072c2f2fbacd17d8c213 /arch | |
parent | 2a195703d6e62172e532ffae05a79e9d12f602bc (diff) |
exynos: Leave the compiler to choose the register to avoid possible r0 corruption
Reported-by: Siarhei Siamashka <siarhei.siamashka@gmail.com>
Signed-off-by: Guillaume GARDET <guillaume.gardet@free.fr>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Minkyu Kang <mk7.kang@samsung.com>
Cc: Tom Rini <trini@konsulko.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Diffstat (limited to 'arch')
-rw-r--r-- | arch/arm/mach-exynos/include/mach/system.h | 3 |
1 files changed, 1 insertions, 2 deletions
diff --git a/arch/arm/mach-exynos/include/mach/system.h b/arch/arm/mach-exynos/include/mach/system.h index 81fa9800b41..48f13c76481 100644 --- a/arch/arm/mach-exynos/include/mach/system.h +++ b/arch/arm/mach-exynos/include/mach/system.h @@ -58,8 +58,7 @@ struct exynos5_sysreg { /* Move 0xd3 value to CPSR register to enable SVC mode */ #define svc32_mode_en() __asm__ __volatile__ \ ("@ I&F disable, Mode: 0x13 - SVC\n\t" \ - "mov r0, #0x13|0xC0\n\t" \ - "msr cpsr_c, r0\n\t" : : ) + "msr cpsr_c, %0\n\t" : : "r"(0x13|0xC0)) /* Set program counter with the given value */ #define set_pc(x) __asm__ __volatile__ ("mov pc, %0\n\t" : : "r"(x)) |