diff options
| author | Adrian Alonso <aalonso@freescale.com> | 2015-09-02 13:54:20 -0500 |
|---|---|---|
| committer | Stefano Babic <sbabic@denx.de> | 2015-09-13 10:11:54 +0200 |
| commit | 75a565f2977b423c43a9ebbc6858d708b36b1194 (patch) | |
| tree | f3925d7d5382a20dd5bc8e92b2bd983815a236f6 /arch | |
| parent | c5752f73a53a8396aae1efa51c5af14b21210b3a (diff) | |
arm: imx-common: init: extend init_aips to support imx7
Extend init_aips to support imx7 SoC, use is_soc_type
and is_cpu_type to resolve at run time aips3 settings
Signed-off-by: Adrian Alonso <aalonso@freescale.com>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm/imx-common/init.c | 44 |
1 files changed, 20 insertions, 24 deletions
diff --git a/arch/arm/imx-common/init.c b/arch/arm/imx-common/init.c index f7ed038d8e8..f1d43142a24 100644 --- a/arch/arm/imx-common/init.c +++ b/arch/arm/imx-common/init.c @@ -13,16 +13,11 @@ void init_aips(void) { - struct aipstz_regs *aips1, *aips2; -#ifdef CONFIG_MX6SX - struct aipstz_regs *aips3; -#endif + struct aipstz_regs *aips1, *aips2, *aips3; aips1 = (struct aipstz_regs *)AIPS1_BASE_ADDR; aips2 = (struct aipstz_regs *)AIPS2_BASE_ADDR; -#ifdef CONFIG_MX6SX aips3 = (struct aipstz_regs *)AIPS3_BASE_ADDR; -#endif /* * Set all MPROTx to be non-bufferable, trusted for R/W, @@ -49,25 +44,26 @@ void init_aips(void) writel(0x00000000, &aips2->opacr3); writel(0x00000000, &aips2->opacr4); -#ifdef CONFIG_MX6SX - /* - * Set all MPROTx to be non-bufferable, trusted for R/W, - * not forced to user-mode. - */ - writel(0x77777777, &aips3->mprot0); - writel(0x77777777, &aips3->mprot1); + if (is_cpu_type(MXC_CPU_MX6SX) || is_soc_type(MXC_SOC_MX7)) + { + /* + * Set all MPROTx to be non-bufferable, trusted for R/W, + * not forced to user-mode. + */ + writel(0x77777777, &aips3->mprot0); + writel(0x77777777, &aips3->mprot1); - /* - * Set all OPACRx to be non-bufferable, not require - * supervisor privilege level for access,allow for - * write access and untrusted master access. - */ - writel(0x00000000, &aips3->opacr0); - writel(0x00000000, &aips3->opacr1); - writel(0x00000000, &aips3->opacr2); - writel(0x00000000, &aips3->opacr3); - writel(0x00000000, &aips3->opacr4); -#endif + /* + * Set all OPACRx to be non-bufferable, not require + * supervisor privilege level for access,allow for + * write access and untrusted master access. + */ + writel(0x00000000, &aips3->opacr0); + writel(0x00000000, &aips3->opacr1); + writel(0x00000000, &aips3->opacr2); + writel(0x00000000, &aips3->opacr3); + writel(0x00000000, &aips3->opacr4); + } } #define SRC_SCR_WARM_RESET_ENABLE 0 |