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authorMasahiro Yamada <yamada.m@jp.panasonic.com>2014-11-11 22:18:22 +0900
committerMasahiro Yamada <yamada.m@jp.panasonic.com>2014-11-12 00:31:01 +0900
commitb67932e3e72b6214cde75c7e2f796d0c70ff3ffb (patch)
treed557935114f8a599f344532d62761e25f9b3ac7a /arch
parent4f25481b839454f0f7b1818fdba07ded4a6b1fe1 (diff)
ARM: UniPhier: call pin_init() also in the normal boot
CONFIG_UNIPHIER_SERIAL has been moved to Kconfig and it is defined in ./.config but not in spl/.config, so pin_init() should be called from the normal image so that UART works correctly. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/cpu/armv7/uniphier/Kconfig4
-rw-r--r--arch/arm/cpu/armv7/uniphier/board_postclk_init.c3
-rw-r--r--arch/arm/cpu/armv7/uniphier/ph1-ld4/Makefile5
-rw-r--r--arch/arm/cpu/armv7/uniphier/ph1-pro4/Makefile4
-rw-r--r--arch/arm/cpu/armv7/uniphier/ph1-sld8/Makefile5
5 files changed, 14 insertions, 7 deletions
diff --git a/arch/arm/cpu/armv7/uniphier/Kconfig b/arch/arm/cpu/armv7/uniphier/Kconfig
index 011c6d9f2d..36b7f11fbe 100644
--- a/arch/arm/cpu/armv7/uniphier/Kconfig
+++ b/arch/arm/cpu/armv7/uniphier/Kconfig
@@ -32,6 +32,10 @@ config CMD_PINMON
The boot mode pins are latched when the system reset is deasserted
and determine which device the system should load a boot image from.
+config SOC_INIT
+ bool
+ default SPL_BUILD
+
config DRAM_INIT
bool
default SPL_BUILD
diff --git a/arch/arm/cpu/armv7/uniphier/board_postclk_init.c b/arch/arm/cpu/armv7/uniphier/board_postclk_init.c
index 3db336fc3e..89e44bb95b 100644
--- a/arch/arm/cpu/armv7/uniphier/board_postclk_init.c
+++ b/arch/arm/cpu/armv7/uniphier/board_postclk_init.c
@@ -20,6 +20,7 @@ void clkrst_init(void);
int board_postclk_init(void)
{
+#ifdef CONFIG_SOC_INIT
bcu_init();
sbc_init();
@@ -37,7 +38,7 @@ int board_postclk_init(void)
clkrst_init();
led_write(B, 2, , );
-
+#endif
pin_init();
led_write(B, 3, , );
diff --git a/arch/arm/cpu/armv7/uniphier/ph1-ld4/Makefile b/arch/arm/cpu/armv7/uniphier/ph1-ld4/Makefile
index 4f42aec49a..fba1cc7498 100644
--- a/arch/arm/cpu/armv7/uniphier/ph1-ld4/Makefile
+++ b/arch/arm/cpu/armv7/uniphier/ph1-ld4/Makefile
@@ -5,6 +5,7 @@
obj-$(CONFIG_DISPLAY_BOARDINFO) += board_info.o
obj-y += platdevice.o
obj-y += boot-mode.o
-obj-$(CONFIG_BOARD_POSTCLK_INIT) += bcu_init.o sbc_init.o sg_init.o \
- pll_init.o clkrst_init.o pinctrl.o
+obj-$(CONFIG_SOC_INIT) += bcu_init.o sbc_init.o sg_init.o pll_init.o \
+ clkrst_init.o
+obj-$(CONFIG_BOARD_POSTCLK_INIT) += pinctrl.o
obj-$(CONFIG_DRAM_INIT) += pll_spectrum.o umc_init.o
diff --git a/arch/arm/cpu/armv7/uniphier/ph1-pro4/Makefile b/arch/arm/cpu/armv7/uniphier/ph1-pro4/Makefile
index 527fd36e0a..74129bc86a 100644
--- a/arch/arm/cpu/armv7/uniphier/ph1-pro4/Makefile
+++ b/arch/arm/cpu/armv7/uniphier/ph1-pro4/Makefile
@@ -5,6 +5,6 @@
obj-$(CONFIG_DISPLAY_BOARDINFO) += board_info.o
obj-y += platdevice.o
obj-y += boot-mode.o
-obj-$(CONFIG_BOARD_POSTCLK_INIT) += sbc_init.o sg_init.o \
- pll_init.o clkrst_init.o pinctrl.o
+obj-$(CONFIG_SOC_INIT) += sbc_init.o sg_init.o pll_init.o clkrst_init.o
+obj-$(CONFIG_BOARD_POSTCLK_INIT) += pinctrl.o
obj-$(CONFIG_DRAM_INIT) += pll_spectrum.o umc_init.o
diff --git a/arch/arm/cpu/armv7/uniphier/ph1-sld8/Makefile b/arch/arm/cpu/armv7/uniphier/ph1-sld8/Makefile
index 4f42aec49a..fba1cc7498 100644
--- a/arch/arm/cpu/armv7/uniphier/ph1-sld8/Makefile
+++ b/arch/arm/cpu/armv7/uniphier/ph1-sld8/Makefile
@@ -5,6 +5,7 @@
obj-$(CONFIG_DISPLAY_BOARDINFO) += board_info.o
obj-y += platdevice.o
obj-y += boot-mode.o
-obj-$(CONFIG_BOARD_POSTCLK_INIT) += bcu_init.o sbc_init.o sg_init.o \
- pll_init.o clkrst_init.o pinctrl.o
+obj-$(CONFIG_SOC_INIT) += bcu_init.o sbc_init.o sg_init.o pll_init.o \
+ clkrst_init.o
+obj-$(CONFIG_BOARD_POSTCLK_INIT) += pinctrl.o
obj-$(CONFIG_DRAM_INIT) += pll_spectrum.o umc_init.o