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authorBin Meng <bmeng.cn@gmail.com>2015-01-20 11:25:44 +0800
committerSimon Glass <sjg@chromium.org>2015-01-23 17:24:55 -0700
commitfea1c47f5481871f9aad70a02dc8c66b91332774 (patch)
treea65ecf824c766339502bb6fb3ef6ff38e0b7fbac /arch
parent3b621ccabdccb34891bb58865a9654a09c2b7279 (diff)
x86: Fix various code format issues in start16.S
Various minor code format issues are fixed in start16.S: - U-boot -> U-Boot - 32bit -> 32-bit - Use TAB instead of SPACE to indent - Move the indention location of the GDT comment block Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'arch')
-rw-r--r--arch/x86/cpu/start16.S20
1 files changed, 10 insertions, 10 deletions
diff --git a/arch/x86/cpu/start16.S b/arch/x86/cpu/start16.S
index 9550502e9a..826e2b4361 100644
--- a/arch/x86/cpu/start16.S
+++ b/arch/x86/cpu/start16.S
@@ -1,5 +1,5 @@
/*
- * U-boot - x86 Startup Code
+ * U-Boot - x86 Startup Code
*
* (C) Copyright 2008-2011
* Graeme Russ, <graeme.russ@gmail.com>
@@ -28,7 +28,7 @@ start16:
movl $GD_FLG_COLD_BOOT, %ebx
xorl %eax, %eax
- movl %eax, %cr3 /* Invalidate TLB */
+ movl %eax, %cr3 /* Invalidate TLB */
/* Turn off cache (this might require a 486-class CPU) */
movl %cr0, %eax
@@ -49,7 +49,7 @@ o32 cs lgdt gdt_ptr
jmp ff
ff:
- /* Finally restore BIST and jump to the 32bit initialization code */
+ /* Finally restore BIST and jump to the 32-bit initialization code */
movw $code32start, %ax
movw %ax, %bp
movl %ecx, %eax
@@ -64,17 +64,17 @@ idt_ptr:
.word 0 /* limit */
.long 0 /* base */
-/*
- * The following Global Descriptor Table is just enough to get us into
- * 'Flat Protected Mode' - It will be discarded as soon as the final
- * GDT is setup in a safe location in RAM
- */
+ /*
+ * The following Global Descriptor Table is just enough to get us into
+ * 'Flat Protected Mode' - It will be discarded as soon as the final
+ * GDT is setup in a safe location in RAM
+ */
gdt_ptr:
.word 0x1f /* limit (31 bytes = 4 GDT entries - 1) */
.long BOOT_SEG + gdt /* base */
-/* Some CPUs are picky about GDT alignment... */
-.align 16
+ /* Some CPUs are picky about GDT alignment... */
+ .align 16
gdt:
/*
* The GDT table ...