diff options
author | Dilan Lee <dilee@nvidia.com> | 2011-06-28 10:09:31 +0800 |
---|---|---|
committer | Simon Glass <sjg@chromium.org> | 2011-08-29 10:39:42 -0700 |
commit | 59a90e76a6e91f33f7710daa1d08c4e681f5921b (patch) | |
tree | 737529cc48fc0bb095ef8666fea6a353d193c185 /arch | |
parent | 3bd903d27348ca63b230a3b537f66064fa853c5c (diff) |
Tegra2: Change the pixel clock of LCD to 70.6Mhz
BUG=chrome-os-partner:3397
BUG=chrome-os-partner:3471
TEST=test on Aebl, pixel clock shows 70.6Mhz on scope
Change-Id: I04ebe6988cb2ea7fc9b38c224421653de9980a0f
Signed-off-by: Dilan Lee <dilee@nvidia.com>
Reviewed-on: http://gerrit.chromium.org/gerrit/3292
Reviewed-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'arch')
-rw-r--r-- | arch/arm/cpu/armv7/tegra2/clock.c | 1 | ||||
-rw-r--r-- | arch/arm/cpu/armv7/tegra2/display.c | 4 | ||||
-rw-r--r-- | arch/arm/include/asm/clocks.h | 1 |
3 files changed, 4 insertions, 2 deletions
diff --git a/arch/arm/cpu/armv7/tegra2/clock.c b/arch/arm/cpu/armv7/tegra2/clock.c index 54a749e4080..6af7010993a 100644 --- a/arch/arm/cpu/armv7/tegra2/clock.c +++ b/arch/arm/cpu/armv7/tegra2/clock.c @@ -901,6 +901,7 @@ void clock_init(void) { pll_rate[CLOCK_ID_MEMORY] = clock_get_rate(CLOCK_ID_MEMORY); pll_rate[CLOCK_ID_PERIPH] = clock_get_rate(CLOCK_ID_PERIPH); + pll_rate[CLOCK_ID_CGENERAL] = clock_get_rate(CLOCK_ID_CGENERAL); pll_rate[CLOCK_ID_OSC] = clock_get_rate(CLOCK_ID_OSC); pll_rate[CLOCK_ID_SFROM32KHZ] = 32768; debug("Osc = %d\n", pll_rate[CLOCK_ID_OSC]); diff --git a/arch/arm/cpu/armv7/tegra2/display.c b/arch/arm/cpu/armv7/tegra2/display.c index 6453737b0de..47161b4c0f2 100644 --- a/arch/arm/cpu/armv7/tegra2/display.c +++ b/arch/arm/cpu/armv7/tegra2/display.c @@ -117,10 +117,10 @@ static int update_display_mode(struct dc_disp_reg *disp, /* * The pixel clock divider is in 7.1 format (where the bottom bit * represents 0.5). Here we calculate the divider needed to get from - * the display clock (typically 216MHz) to the pixel clock. We round + * the display clock (typically 600MHz) to the pixel clock. We round * up or down as requried. */ - rate = clock_get_periph_rate(PERIPH_ID_DISP1, CLOCK_ID_PERIPH); + rate = clock_get_periph_rate(PERIPH_ID_DISP1, CLOCK_ID_CGENERAL); div = ((rate * 2 + config->pixel_clock / 2) / config->pixel_clock) - 2; debug("Display clock %lu, divider %lu\n", rate, div); diff --git a/arch/arm/include/asm/clocks.h b/arch/arm/include/asm/clocks.h index 5fe0133311c..45deb2af718 100644 --- a/arch/arm/include/asm/clocks.h +++ b/arch/arm/include/asm/clocks.h @@ -42,5 +42,6 @@ enum { CLK_144M = 144000000, CLK_216M = 216000000, CLK_300M = 300000000, + CLK_600M = 600000000, }; |