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authorMarek Vasut <marex@denx.de>2015-07-09 05:36:23 +0200
committerMarek Vasut <marex@denx.de>2015-08-08 14:14:07 +0200
commit6473054a125f712648038c100d3c5ab9743cb1f1 (patch)
treed6cfedeefadaa724c25021fb49c73a2b28c7c7d2 /arch
parentbd65fe35fffd9a9e8c8abe5321a51a8c43eda97d (diff)
arm: socfpga: spl: Merge spl_board_init() into board_init_f()
The code in spl_board_init() should have been in board_init_f() from the beginning, since it is code which configures system and then starts DRAM. Thus, it cannot be in spl_board_init(), which is called from board_init_r() , which already expects a working DRAM. Signed-off-by: Marek Vasut <marex@denx.de>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/mach-socfpga/spl.c29
1 files changed, 12 insertions, 17 deletions
diff --git a/arch/arm/mach-socfpga/spl.c b/arch/arm/mach-socfpga/spl.c
index f134bb794fc..ea0ed1a24d7 100644
--- a/arch/arm/mach-socfpga/spl.c
+++ b/arch/arm/mach-socfpga/spl.c
@@ -29,6 +29,11 @@ static struct scu_registers *scu_regs =
static struct nic301_registers *nic301_regs =
(struct nic301_registers *)SOCFPGA_L3REGS_ADDRESS;
+u32 spl_boot_device(void)
+{
+ return BOOT_DEVICE_RAM;
+}
+
static void socfpga_nic301_slave_ns(void)
{
writel(0x1, &nic301_regs->lwhps2fpgaregs);
@@ -41,9 +46,14 @@ static void socfpga_nic301_slave_ns(void)
void board_init_f(ulong dummy)
{
+#ifndef CONFIG_SOCFPGA_VIRTUAL_TARGET
+ const struct cm_config *cm_default_cfg = cm_get_default_config();
+#endif
struct socfpga_system_manager *sysmgr_regs =
(struct socfpga_system_manager *)SOCFPGA_SYSMGR_ADDRESS;
+ unsigned long sdram_size;
unsigned long reg;
+
/*
* First C code to run. Clear fake OCRAM ECC first as SBE
* and DBE might triggered during power on
@@ -67,24 +77,7 @@ void board_init_f(ulong dummy)
writel(0x1, &nic301_regs->remap); /* remap.mpuzero */
writel(0x1, &pl310->pl310_addr_filter_start);
- board_init_r(NULL, 0);
-}
-
-u32 spl_boot_device(void)
-{
- return BOOT_DEVICE_RAM;
-}
-
-/*
- * Board initialization after bss clearance
- */
-void spl_board_init(void)
-{
- unsigned long sdram_size;
#ifndef CONFIG_SOCFPGA_VIRTUAL_TARGET
- const struct cm_config *cm_default_cfg = cm_get_default_config();
-#endif
-
debug("Freezing all I/O banks\n");
/* freeze all IO banks */
sys_mgr_frzctrl_freeze_req();
@@ -153,4 +146,6 @@ void spl_board_init(void)
}
socfpga_bridges_reset(1);
+
+ board_init_r(NULL, 0);
}