Merge git://git.denx.de/u-boot-marvell

- Multiples updates to the turris boards / platform
- Changes / enhancements to the Marvell PHY drivers, mainly
  to support the turris platform
- Many fixes and enhancements to the pxa3xx NAND driver
- Fixes for the UART boot mode in kwboot
- Misc minor changes to other 32bit and 64bit boards

5 files changed, 44 insertions, 28 deletions

diff --git a/arch/arm/dts/armada-3720-turris-mox.dts b/arch/arm/dts/armada-3720-turris-mox.dts
index bef100afce2..7babc166799 100644
--- a/arch/arm/dts/armada-3720-turris-mox.dts
+++ b/arch/arm/dts/armada-3720-turris-mox.dts
@@ -94,17 +94,13 @@
 	};
 };
 
-&pinctrl_sb {
-	smi_pins: smi-pins {
-		groups = "smi";
-		function = "smi";
-	};
-};
-
 &spi0 {
 	status = "okay";
 	pinctrl-names = "default";
 	pinctrl-0 = <&spi_cs1_pins>;
+	assigned-clocks = <&nb_periph_clk 7>;
+	assigned-clock-parents = <&tbg 1>;
+	assigned-clock-rates = <20000000>;
 
 	spi-flash@0 {
 		#address-cells = <1>;
@@ -130,3 +126,10 @@
 	vbus-supply = <&reg_usb3_vbus>;
 	status = "okay";
 };
+
+&pcie0 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pcie_pins>;
+	reset-gpio = <&gpiosb 3 GPIO_ACTIVE_HIGH>;
+	status = "disabled";
+};
diff --git a/arch/arm/dts/armada-8040-mcbin.dts b/arch/arm/dts/armada-8040-mcbin.dts
index 08f1d7df69a..f912596c2cd 100644
--- a/arch/arm/dts/armada-8040-mcbin.dts
+++ b/arch/arm/dts/armada-8040-mcbin.dts
@@ -154,14 +154,6 @@
 	status = "okay";
 };
 
-/* uSD slot */
-&cpm_sdhci0 {
-	pinctrl-names = "default";
-	pinctrl-0 = <&cpm_sdhci_pins>;
-	bus-width = <4>;
-	status = "okay";
-};
-
 &cpm_comphy {
 	/*
 	 * CP0 Serdes Configuration:
diff --git a/arch/arm/mach-mvebu/armada8k/cpu.c b/arch/arm/mach-mvebu/armada8k/cpu.c
index f8e8e73610d..959a7cff764 100644
--- a/arch/arm/mach-mvebu/armada8k/cpu.c
+++ b/arch/arm/mach-mvebu/armada8k/cpu.c
@@ -18,6 +18,10 @@
 #define RFU_GLOBAL_SW_RST		(MVEBU_RFU_BASE + 0x84)
 #define RFU_SW_RESET_OFFSET		0
 
+#define SAR0_REG			(MVEBU_REGISTER(0x2400200))
+#define BOOT_MODE_MASK			0x3f
+#define BOOT_MODE_OFFSET		4
+
 /*
  * The following table includes all memory regions for Armada 7k and
  * 8k SoCs. The Armada 7k is missing the CP110 slave regions here. Lets
@@ -125,3 +129,23 @@ u32 mvebu_get_nand_clock(void)
 	else
 		return 250 * 1000000;
 }
+
+int mmc_get_env_dev(void)
+{
+	u32 reg;
+	unsigned int boot_mode;
+
+	reg = readl(SAR0_REG);
+	boot_mode = (reg >> BOOT_MODE_OFFSET) & BOOT_MODE_MASK;
+
+	switch (boot_mode) {
+	case 0x28:
+	case 0x2a:
+		return 0;
+	case 0x29:
+	case 0x2b:
+		return 1;
+	}
+
+	return CONFIG_SYS_MMC_ENV_DEV;
+}
diff --git a/arch/arm/mach-mvebu/include/mach/soc.h b/arch/arm/mach-mvebu/include/mach/soc.h
index 623ab4eb8d9..6e2e14efe0b 100644
--- a/arch/arm/mach-mvebu/include/mach/soc.h
+++ b/arch/arm/mach-mvebu/include/mach/soc.h
@@ -110,16 +110,12 @@
 #define COMPHY_REFCLK_ALIGNMENT	(MVEBU_REGISTER(0x182f8))
 
 /* BootROM error register (also includes some status infos) */
-#if defined(CONFIG_ARMADA_38X)
-#define CONFIG_BOOTROM_ERR_REG	(MVEBU_REGISTER(0x182d0))
-#define BOOTROM_ERR_MODE_OFFS	0
-#define BOOTROM_ERR_MODE_MASK	(0xf << BOOTROM_ERR_MODE_OFFS)
-#else
 #define CONFIG_BOOTROM_ERR_REG	(MVEBU_REGISTER(0x182d0))
 #define BOOTROM_ERR_MODE_OFFS	28
 #define BOOTROM_ERR_MODE_MASK	(0xf << BOOTROM_ERR_MODE_OFFS)
 #define BOOTROM_ERR_MODE_UART	0x6
-#endif
+#define BOOTROM_ERR_CODE_OFFS	0
+#define BOOTROM_ERR_CODE_MASK	(0xf << BOOTROM_ERR_CODE_OFFS)
 
 #if defined(CONFIG_ARMADA_375)
 /* SAR values for Armada 375 */
diff --git a/arch/arm/mach-mvebu/spl.c b/arch/arm/mach-mvebu/spl.c
index 50b24f5760b..9dd7c84b687 100644
--- a/arch/arm/mach-mvebu/spl.c
+++ b/arch/arm/mach-mvebu/spl.c
@@ -25,17 +25,18 @@ static u32 get_boot_device(void)
 	val = readl(CONFIG_BOOTROM_ERR_REG);
 	boot_device = (val & BOOTROM_ERR_MODE_MASK) >> BOOTROM_ERR_MODE_OFFS;
 	debug("BOOTROM_REG=0x%08x boot_device=0x%x\n", val, boot_device);
-#if defined(CONFIG_ARMADA_38X)
+	if (boot_device == BOOTROM_ERR_MODE_UART)
+		return BOOT_DEVICE_UART;
+
+#ifdef CONFIG_ARMADA_38X
 	/*
-	 * If the bootrom error register contains any else than zeros
-	 * in the first 8 bits it's an error condition. And in that case
-	 * try to boot from UART.
+	 * If the bootrom error code contains any other than zeros it's an
+	 * error condition and the bootROM has fallen back to UART boot
 	 */
+	boot_device = (val & BOOTROM_ERR_CODE_MASK) >> BOOTROM_ERR_CODE_OFFS;
 	if (boot_device)
-#else
-	if (boot_device == BOOTROM_ERR_MODE_UART)
-#endif
 		return BOOT_DEVICE_UART;
+#endif
 
 	/*
 	 * Now check the SAR register for the strapped boot-device