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authorChen-Yu Tsai <wens@csie.org>2016-10-28 18:21:35 +0800
committerHans de Goede <hdegoede@redhat.com>2016-10-30 11:38:04 +0100
commit31633a5677a5c57d87a8b949ca4ab376d4d10fb7 (patch)
treeb4366a61034a3da0275b91b4f3d7c9b1eb777a60 /arch
parentc53344ad9cbf09e9444eb416041f9fb5f373aa9b (diff)
sunxi: Add support for SID e-fuses on sun9i
The A80 has SID e-fuses. Like other newer SoCs, the actual e-fuses are at an offset of 0x200 within the SID address space. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/include/asm/arch-sunxi/cpu_sun9i.h2
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/arm/include/asm/arch-sunxi/cpu_sun9i.h b/arch/arm/include/asm/arch-sunxi/cpu_sun9i.h
index ba18a0f551..c775bcc515 100644
--- a/arch/arm/include/asm/arch-sunxi/cpu_sun9i.h
+++ b/arch/arm/include/asm/arch-sunxi/cpu_sun9i.h
@@ -24,6 +24,8 @@
#define SUNXI_TSC_BASE (REGS_AHB0_BASE + 0x4000)
#define SUNXI_GTBUS_BASE (REGS_AHB0_BASE + 0x9000)
+/* SID address space starts at 0x01ce000, but e-fuse is at offset 0x200 */
+#define SUNXI_SID_BASE (REGS_AHB0_BASE + 0xe200)
#define SUNXI_MMC0_BASE (REGS_AHB0_BASE + 0x0f000)
#define SUNXI_MMC1_BASE (REGS_AHB0_BASE + 0x10000)