diff options
| author | Tom Rini <trini@ti.com> | 2013-03-12 14:28:15 -0400 |
|---|---|---|
| committer | Tom Rini <trini@ti.com> | 2013-03-12 14:28:15 -0400 |
| commit | 7d3ef444df299aea39909eaccbed1d915b4a7370 (patch) | |
| tree | fb1f19eb9dd56591712d9b10768db424246e98c1 /arch | |
| parent | 4065722c28ef814d3072fb8456e49c0b0a387d12 (diff) | |
| parent | 5091e9a86ea034ded668d299e09c1d5dd2cb680c (diff) | |
Merge branch 'am335x-platform-2013.01.01' into ti-u-boot-2013.01.01
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm/cpu/armv7/am33xx/ddr.c | 15 | ||||
| -rw-r--r-- | arch/arm/cpu/armv7/omap-common/boot-common.c | 3 | ||||
| -rw-r--r-- | arch/arm/include/asm/arch-am33xx/ddr_defs.h | 17 | ||||
| -rw-r--r-- | arch/arm/include/asm/arch-am33xx/spl.h | 1 |
4 files changed, 33 insertions, 3 deletions
diff --git a/arch/arm/cpu/armv7/am33xx/ddr.c b/arch/arm/cpu/armv7/am33xx/ddr.c index fd9fc4a720..7932a39e7c 100644 --- a/arch/arm/cpu/armv7/am33xx/ddr.c +++ b/arch/arm/cpu/armv7/am33xx/ddr.c @@ -45,12 +45,21 @@ static struct ddr_cmdtctrl *ioctrl_reg = { */ void config_sdram(const struct emif_regs *regs) { - writel(regs->ref_ctrl, &emif_reg->emif_sdram_ref_ctrl); - writel(regs->ref_ctrl, &emif_reg->emif_sdram_ref_ctrl_shdw); - if (regs->zq_config){ + if (regs->zq_config) { + /* + * A value of 0x2800 for the REF CTRL will give us + * about 570us for a delay, which will be long enough + * to configure things. + */ + writel(0x2800, &emif_reg->emif_sdram_ref_ctrl); writel(regs->zq_config, &emif_reg->emif_zq_config); writel(regs->sdram_config, &cstat->secure_emif_sdram_config); + writel(regs->sdram_config, &emif_reg->emif_sdram_config); + writel(regs->ref_ctrl, &emif_reg->emif_sdram_ref_ctrl); + writel(regs->ref_ctrl, &emif_reg->emif_sdram_ref_ctrl_shdw); } + writel(regs->ref_ctrl, &emif_reg->emif_sdram_ref_ctrl); + writel(regs->ref_ctrl, &emif_reg->emif_sdram_ref_ctrl_shdw); writel(regs->sdram_config, &emif_reg->emif_sdram_config); } diff --git a/arch/arm/cpu/armv7/omap-common/boot-common.c b/arch/arm/cpu/armv7/omap-common/boot-common.c index 2b584e0a53..1c8b6177dd 100644 --- a/arch/arm/cpu/armv7/omap-common/boot-common.c +++ b/arch/arm/cpu/armv7/omap-common/boot-common.c @@ -55,6 +55,9 @@ void spl_board_init(void) #ifdef CONFIG_SPL_NAND_SUPPORT gpmc_init(); #endif +#if defined(CONFIG_AM33XX) && defined(CONFIG_SPL_MUSB_NEW_SUPPORT) + arch_misc_init(); +#endif } int board_mmc_init(bd_t *bis) diff --git a/arch/arm/include/asm/arch-am33xx/ddr_defs.h b/arch/arm/include/asm/arch-am33xx/ddr_defs.h index 8e69fb67b1..7b46dbdc9d 100644 --- a/arch/arm/include/asm/arch-am33xx/ddr_defs.h +++ b/arch/arm/include/asm/arch-am33xx/ddr_defs.h @@ -65,6 +65,23 @@ #define MT41J128MJT125_PHY_FIFO_WE 0x100 #define MT41J128MJT125_IOCTRL_VALUE 0x18B +/* Micron MT41J512M8RH-125 on EVM v1.5 */ +#define MT41J512M8RH125_EMIF_READ_LATENCY 0x06 +#define MT41J512M8RH125_EMIF_TIM1 0x0888A39B +#define MT41J512M8RH125_EMIF_TIM2 0x26517FDA +#define MT41J512M8RH125_EMIF_TIM3 0x501F84EF +#define MT41J512M8RH125_EMIF_SDCFG 0x61C04BB2 +#define MT41J512M8RH125_EMIF_SDREF 0x0000093B +#define MT41J512M8RH125_ZQ_CFG 0x50074BE4 +#define MT41J512M8RH125_DLL_LOCK_DIFF 0x1 +#define MT41J512M8RH125_RATIO 0x80 +#define MT41J512M8RH125_INVERT_CLKOUT 0x0 +#define MT41J512M8RH125_RD_DQS 0x3B +#define MT41J512M8RH125_WR_DQS 0x3C +#define MT41J512M8RH125_PHY_FIFO_WE 0xA5 +#define MT41J512M8RH125_PHY_WR_DATA 0x74 +#define MT41J512M8RH125_IOCTRL_VALUE 0x18B + /** * Configure SDRAM */ diff --git a/arch/arm/include/asm/arch-am33xx/spl.h b/arch/arm/include/asm/arch-am33xx/spl.h index 644ff353fe..e961ce0578 100644 --- a/arch/arm/include/asm/arch-am33xx/spl.h +++ b/arch/arm/include/asm/arch-am33xx/spl.h @@ -29,6 +29,7 @@ #define BOOT_DEVICE_MMC2 9 /* eMMC or daughter card */ #define BOOT_DEVICE_SPI 11 #define BOOT_DEVICE_UART 65 +#define BOOT_DEVICE_USBETH 68 #define BOOT_DEVICE_CPGMAC 70 #define BOOT_DEVICE_MMC2_2 0xFF #endif |