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authorMasahiro Yamada <yamada.masahiro@socionext.com>2016-08-10 16:08:38 +0900
committerMasahiro Yamada <yamada.masahiro@socionext.com>2016-08-11 17:49:12 +0900
commite731a5385d1e8b0ffaa69977899dc4246de53db4 (patch)
treee64e93c325370ee63ef204a678f226316a637674 /arch
parent95a1feca2e852ade552495e3688c5ef2afae68aa (diff)
ARM: uniphier: do not compile v7_outer_cache_disable if L2 is disabled
If CONFIG_UNIPHIER_L2CACHE_ON is undefined, the L2 cache is never enabled, so there is no need for v7_outer_cache_disable(). The weak stub avoids the compile error anyway. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/mach-uniphier/arm32/cache-uniphier.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/mach-uniphier/arm32/cache-uniphier.c b/arch/arm/mach-uniphier/arm32/cache-uniphier.c
index a210835ea9..66e9f6b9b7 100644
--- a/arch/arm/mach-uniphier/arm32/cache-uniphier.c
+++ b/arch/arm/mach-uniphier/arm32/cache-uniphier.c
@@ -183,7 +183,6 @@ void v7_outer_cache_enable(void)
tmp |= UNIPHIER_SSCC_ON;
writel(tmp, UNIPHIER_SSCC);
}
-#endif
void v7_outer_cache_disable(void)
{
@@ -193,6 +192,7 @@ void v7_outer_cache_disable(void)
tmp &= ~UNIPHIER_SSCC_ON;
writel(tmp, UNIPHIER_SSCC);
}
+#endif
void enable_caches(void)
{