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authorStephen Warren <swarren@nvidia.com>2018-07-31 12:39:07 -0600
committerTom Warren <twarren@nvidia.com>2018-08-21 08:41:00 -0700
commit3d186cf3f3ab5c18ede0f0a4ff85ffe99839bc7b (patch)
treeb123c7f2ddc4c08d749cb7bf7c0d3e7c9c10edae /arch
parent0de68cf3f857ad9ad9d9ca86952b8c9df559fec6 (diff)
ARM: tegra: avoid more operations in non-secure world
A secure monitor that runs before U-Boot, and hence causes U-Boot to run in non-secure world, must implement a few operations that U-Boot otherwise implements when running in secure world. Fix U-Boot to skip these operations when running in non-secure world. In particular: - The secure monitor must provide the LP0 resume code and own LP0 configuration in order to maintain security, so must initialize all the PMC scratch registers used by the boot ROM during LP0 resume. Consequently, U-Boot should not attempt to clear those registers, since the register accesses will fail or cause an error. - The secure monitor owns system security, and so is responsible for configuring security-related items such as the VPR. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/mach-tegra/ap.c9
-rw-r--r--arch/arm/mach-tegra/gpu.c18
2 files changed, 19 insertions, 8 deletions
diff --git a/arch/arm/mach-tegra/ap.c b/arch/arm/mach-tegra/ap.c
index bf8001d9db0..84c20a48ad4 100644
--- a/arch/arm/mach-tegra/ap.c
+++ b/arch/arm/mach-tegra/ap.c
@@ -155,8 +155,13 @@ static void init_pmc_scratch(void)
int i;
/* SCRATCH0 is initialized by the boot ROM and shouldn't be cleared */
- for (i = 0; i < 23; i++)
- writel(0, &pmc->pmc_scratch1+i);
+#if defined(CONFIG_TEGRA_SUPPORT_NON_SECURE)
+ if (!tegra_cpu_is_non_secure())
+#endif
+ {
+ for (i = 0; i < 23; i++)
+ writel(0, &pmc->pmc_scratch1 + i);
+ }
/* ODMDATA is for kernel use to determine RAM size, LP config, etc. */
odmdata = get_odmdata();
diff --git a/arch/arm/mach-tegra/gpu.c b/arch/arm/mach-tegra/gpu.c
index 2e203f735bf..e047f678211 100644
--- a/arch/arm/mach-tegra/gpu.c
+++ b/arch/arm/mach-tegra/gpu.c
@@ -9,6 +9,7 @@
#include <asm/io.h>
#include <asm/arch/tegra.h>
#include <asm/arch/mc.h>
+#include <asm/arch-tegra/ap.h>
#include <fdt_support.h>
@@ -18,12 +19,17 @@ void tegra_gpu_config(void)
{
struct mc_ctlr *mc = (struct mc_ctlr *)NV_PA_MC_BASE;
- /* Turn VPR off */
- writel(0, &mc->mc_video_protect_size_mb);
- writel(TEGRA_MC_VIDEO_PROTECT_REG_WRITE_ACCESS_DISABLED,
- &mc->mc_video_protect_reg_ctrl);
- /* read back to ensure the write went through */
- readl(&mc->mc_video_protect_reg_ctrl);
+#if defined(CONFIG_TEGRA_SUPPORT_NON_SECURE)
+ if (!tegra_cpu_is_non_secure())
+#endif
+ {
+ /* Turn VPR off */
+ writel(0, &mc->mc_video_protect_size_mb);
+ writel(TEGRA_MC_VIDEO_PROTECT_REG_WRITE_ACCESS_DISABLED,
+ &mc->mc_video_protect_reg_ctrl);
+ /* read back to ensure the write went through */
+ readl(&mc->mc_video_protect_reg_ctrl);
+ }
debug("configured VPR\n");