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| author | Igor Opaniuk <igor.opaniuk@toradex.com> | 2019-12-03 14:04:47 +0200 |
|---|---|---|
| committer | Marcel Ziswiler <marcel.ziswiler@toradex.com> | 2019-12-23 10:28:16 +0100 |
| commit | 3a4c1c833b49b717a5b480438084b1edd6bfa1a9 (patch) | |
| tree | 91466ed43e1a6891d238c928108c2ecbf234969d /arch/xtensa/cpu/start.S | |
| parent | b3f9a339daa61154d87f890cfa88e5f6abab5ae0 (diff) | |
board: colibri_imx7: reserve DDR memory for Cortex-M4
i.MX 7's Cortex-M4 core can run from DDR and uses DDR memory for
the rpmsg communication. Both use cases need a fixed location of
memory reserved. For the rpmsg use case the reserved area needs
to be in sync with the kernel's hardcoded vring descriptor location.
Use the linux,usable-memory property to carve out 1MB of memory
in case the M4 core is running. Also make sure that the i.MX 7
specific rpmsg driver does not get loaded in case we do not carve
out memory.
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
(cherry picked from commit c671d8af0bb07b028d808b994b83b2ec25578a44)
Diffstat (limited to 'arch/xtensa/cpu/start.S')
0 files changed, 0 insertions, 0 deletions