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authorSimon Glass <sjg@chromium.org>2018-08-01 15:22:37 -0600
committerSimon Glass <sjg@chromium.org>2018-08-01 16:30:06 -0600
commit3ab9598df714556b649048b2a387071253e9e731 (patch)
tree55a61a2125ff40b15a96e47104402f06a91f5eb9 /arch/x86
parent46d61a2f2aeefcd622c9678716429e68a3a98811 (diff)
binman: Rename 'position' to 'offset'
After some thought, I believe there is an unfortunate naming flaw in binman. Entries have a position and size, but now that we support hierarchical sections it is unclear whether a position should be an absolute position within the image, or a relative position within its parent section. At present 'position' actually means the relative position. This indicates a need for an 'image position' for code that wants to find the location of an entry without having to do calculations back through parents to discover this image position. A better name for the current 'position' or 'pos' is 'offset'. It is not always an absolute position, but it is always an offset from its parent offset. It is unfortunate to rename this concept now, 18 months after binman was introduced. However I believe it is the right thing to do. The impact is mostly limited to binman itself and a few changes to in-tree users to binman: tegra sunxi x86 The change makes old binman definitions (e.g. downstream or out-of-tree) incompatible if they use the 'pos = <...>' property. Later work will adjust binman to generate an error when it is used. Signed-off-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'arch/x86')
-rw-r--r--arch/x86/dts/u-boot.dtsi24
1 files changed, 12 insertions, 12 deletions
diff --git a/arch/x86/dts/u-boot.dtsi b/arch/x86/dts/u-boot.dtsi
index 1253fa51c2..1050236330 100644
--- a/arch/x86/dts/u-boot.dtsi
+++ b/arch/x86/dts/u-boot.dtsi
@@ -11,7 +11,7 @@
binman {
filename = "u-boot.rom";
end-at-4gb;
- sort-by-pos;
+ sort-by-offset;
pad-byte = <0xff>;
size = <CONFIG_ROM_SIZE>;
#ifdef CONFIG_HAVE_INTEL_ME
@@ -24,18 +24,18 @@
#endif
#ifdef CONFIG_SPL
u-boot-spl-with-ucode-ptr {
- pos = <CONFIG_SPL_TEXT_BASE>;
+ offset = <CONFIG_SPL_TEXT_BASE>;
};
u-boot-dtb-with-ucode2 {
type = "u-boot-dtb-with-ucode";
};
u-boot {
- pos = <0xfff00000>;
+ offset = <0xfff00000>;
};
#else
u-boot-with-ucode-ptr {
- pos = <CONFIG_SYS_TEXT_BASE>;
+ offset = <CONFIG_SYS_TEXT_BASE>;
};
#endif
u-boot-dtb-with-ucode {
@@ -45,45 +45,45 @@
};
#ifdef CONFIG_HAVE_MRC
intel-mrc {
- pos = <CONFIG_X86_MRC_ADDR>;
+ offset = <CONFIG_X86_MRC_ADDR>;
};
#endif
#ifdef CONFIG_HAVE_FSP
intel-fsp {
filename = CONFIG_FSP_FILE;
- pos = <CONFIG_FSP_ADDR>;
+ offset = <CONFIG_FSP_ADDR>;
};
#endif
#ifdef CONFIG_HAVE_CMC
intel-cmc {
filename = CONFIG_CMC_FILE;
- pos = <CONFIG_CMC_ADDR>;
+ offset = <CONFIG_CMC_ADDR>;
};
#endif
#ifdef CONFIG_HAVE_VGA_BIOS
intel-vga {
filename = CONFIG_VGA_BIOS_FILE;
- pos = <CONFIG_VGA_BIOS_ADDR>;
+ offset = <CONFIG_VGA_BIOS_ADDR>;
};
#endif
#ifdef CONFIG_HAVE_VBT
intel-vbt {
filename = CONFIG_VBT_FILE;
- pos = <CONFIG_VBT_ADDR>;
+ offset = <CONFIG_VBT_ADDR>;
};
#endif
#ifdef CONFIG_HAVE_REFCODE
intel-refcode {
- pos = <CONFIG_X86_REFCODE_ADDR>;
+ offset = <CONFIG_X86_REFCODE_ADDR>;
};
#endif
#ifdef CONFIG_SPL
x86-start16-spl {
- pos = <CONFIG_SYS_X86_START16>;
+ offset = <CONFIG_SYS_X86_START16>;
};
#else
x86-start16 {
- pos = <CONFIG_SYS_X86_START16>;
+ offset = <CONFIG_SYS_X86_START16>;
};
#endif
};