diff options
author | Bin Meng <bmeng.cn@gmail.com> | 2015-10-11 21:37:36 -0700 |
---|---|---|
committer | Simon Glass <sjg@chromium.org> | 2015-10-21 07:46:26 -0600 |
commit | f6220f1a86109f88950fd42e3af54314de24365a (patch) | |
tree | 4749256576c9bb19a1f71ecc0ca1b09bbe07a854 /arch/x86/include/asm/mrccache.h | |
parent | e2d76e95d3f048a171ccd65ea0bd954ccc2b15e0 (diff) |
x86: Move mrccache.[c|h] to a common place
mrccache implementation can be common for all boards. Move it
from ivybridge cpu directory to the common lib directory.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'arch/x86/include/asm/mrccache.h')
-rw-r--r-- | arch/x86/include/asm/mrccache.h | 51 |
1 files changed, 51 insertions, 0 deletions
diff --git a/arch/x86/include/asm/mrccache.h b/arch/x86/include/asm/mrccache.h new file mode 100644 index 00000000000..1d50ebb85a7 --- /dev/null +++ b/arch/x86/include/asm/mrccache.h @@ -0,0 +1,51 @@ +/* + * Copyright (c) 2014 Google, Inc + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef _ASM_ARCH_MRCCACHE_H +#define _ASM_ARCH_MRCCACHE_H + +#define MRC_DATA_ALIGN 0x1000 +#define MRC_DATA_SIGNATURE (('M' << 0) | ('R' << 8) | ('C' << 16) | \ + ('D'<<24)) + +__packed struct mrc_data_container { + u32 signature; /* "MRCD" */ + u32 data_size; /* Size of the 'data' field */ + u32 checksum; /* IP style checksum */ + u32 reserved; /* For header alignment */ + u8 data[0]; /* Variable size, platform/run time dependent */ +}; + +struct fmap_entry; +struct udevice; + +/** + * mrccache_find_current() - find the latest MRC cache record + * + * This searches the MRC cache region looking for the latest record to use + * for setting up SDRAM + * + * @entry: Information about the position and size of the MRC cache + * @return pointer to latest record, or NULL if none + */ +struct mrc_data_container *mrccache_find_current(struct fmap_entry *entry); + +/** + * mrccache_update() - update the MRC cache with a new record + * + * This writes a new record to the end of the MRC cache. If the new record is + * the same as the latest record then the write is skipped + * + * @sf: SPI flash to write to + * @entry: Position and size of MRC cache in SPI flash + * @cur: Record to write + * @return 0 if updated, -EEXIST if the record is the same as the latest + * record, other error if SPI write failed + */ +int mrccache_update(struct udevice *sf, struct fmap_entry *entry, + struct mrc_data_container *cur); + +#endif |