diff options
| author | Bin Meng <bmeng.cn@gmail.com> | 2015-07-22 01:21:09 -0700 |
|---|---|---|
| committer | Simon Glass <sjg@chromium.org> | 2015-07-28 10:36:24 -0600 |
| commit | abab912813169e9f24e12b9a0a993b0c6060c808 (patch) | |
| tree | 7f578d1fe98aca74dee812131ab44156028d0820 /arch/x86/include/asm/mpspec.h | |
| parent | a2771943415c41b7a730e89e8eba9a43a4fa3fad (diff) | |
x86: mpspec: Allow platform to determine how PIRQ is connected to I/O APIC
Currently during writing MP table I/O interrupt assignment entry, we
assume the PIRQ is directly mapped to I/O APIC INTPIN#16-23, which
however is not always the case on some platforms.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'arch/x86/include/asm/mpspec.h')
| -rw-r--r-- | arch/x86/include/asm/mpspec.h | 17 |
1 files changed, 17 insertions, 0 deletions
diff --git a/arch/x86/include/asm/mpspec.h b/arch/x86/include/asm/mpspec.h index efa9231f92..ad8eba947b 100644 --- a/arch/x86/include/asm/mpspec.h +++ b/arch/x86/include/asm/mpspec.h @@ -432,6 +432,23 @@ void mp_write_compat_address_space(struct mp_config_table *mc, int busid, u32 mptable_finalize(struct mp_config_table *mc); /** + * mp_determine_pci_dstirq() - Determine PCI device's int pin on the I/O APIC + * + * This determines a PCI device's interrupt pin number on the I/O APIC. + * + * This can be implemented by platform codes to handle specifal cases, which + * do not conform to the normal chipset/board design where PIRQ[A-H] are mapped + * directly to I/O APIC INTPIN#16-23. + * + * @bus: bus number of the pci device + * @dev: device number of the pci device + * @func: function number of the pci device + * @pirq: PIRQ number the PCI device's interrupt pin is routed to + * @return: interrupt pin number on the I/O APIC + */ +int mp_determine_pci_dstirq(int bus, int dev, int func, int pirq); + +/** * write_mp_table() - Write MP table * * This writes MP table at a given address. |