diff options
| author | Bin Meng <bmeng.cn@gmail.com> | 2014-12-17 15:50:44 +0800 |
|---|---|---|
| committer | Simon Glass <sjg@chromium.org> | 2014-12-18 17:26:07 -0700 |
| commit | adfe3b247a7a281931f0fd865e9d00600e9dd384 (patch) | |
| tree | e2a388dc0df283233d937f35433ab416b3d48307 /arch/x86/include/asm/arch-queensbay/tnc.h | |
| parent | 63faf2507d263bbd6285b3fe637fd80df05a58a0 (diff) | |
x86: crownbay: Add SPI flash support
The Crown Bay board has an SST25VF016B flash connected to the Tunnel
Creek processor SPI controller used as the BIOS media where U-Boot
is stored. Enable this flash support.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'arch/x86/include/asm/arch-queensbay/tnc.h')
| -rw-r--r-- | arch/x86/include/asm/arch-queensbay/tnc.h | 15 |
1 files changed, 15 insertions, 0 deletions
diff --git a/arch/x86/include/asm/arch-queensbay/tnc.h b/arch/x86/include/asm/arch-queensbay/tnc.h new file mode 100644 index 0000000000..67c5e0586c --- /dev/null +++ b/arch/x86/include/asm/arch-queensbay/tnc.h @@ -0,0 +1,15 @@ +/* + * Copyright (C) 2014, Bin Meng <bmeng.cn@gmail.com> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef _X86_ARCH_TNC_H_ +#define _X86_ARCH_TNC_H_ + +#include <pci.h> + +/* PCI Configuration Space (D31:F0): LPC */ +#define PCH_LPC_DEV PCI_BDF(0, 0x1f, 0) + +#endif /* _X86_ARCH_TNC_H_ */ |