diff options
| author | Simon Glass <sjg@chromium.org> | 2019-05-07 21:41:14 -0600 |
|---|---|---|
| committer | Bin Meng <bmeng.cn@gmail.com> | 2019-05-08 13:02:19 +0800 |
| commit | 3dc13cc3a05643a8764f9f455fff54f45b0fcd14 (patch) | |
| tree | 8e188032ff730a021f7bfec41ab1feb86bcd0e58 /arch/x86/dts | |
| parent | 969ed0124289f89421b3bf36b1055ca93d900203 (diff) | |
x86: samus: Update device tree for verified boot
Add nvdata drivers for the TPM and RTC as used on samus. These are needed
for Chromium OS verified boot on samus.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Diffstat (limited to 'arch/x86/dts')
| -rw-r--r-- | arch/x86/dts/chromebook_samus.dts | 22 |
1 files changed, 21 insertions, 1 deletions
diff --git a/arch/x86/dts/chromebook_samus.dts b/arch/x86/dts/chromebook_samus.dts index c4207af48a..772ea5c91b 100644 --- a/arch/x86/dts/chromebook_samus.dts +++ b/arch/x86/dts/chromebook_samus.dts @@ -9,6 +9,12 @@ /include/ "rtc.dtsi" /include/ "tsc_timer.dtsi" +#ifdef CONFIG_CHROMEOS +#include "chromeos-x86.dtsi" +#include "flashmap-x86-ro.dtsi" +#include "flashmap-8mb-rw.dtsi" +#endif + / { model = "Google Samus"; compatible = "google,samus", "intel,broadwell"; @@ -581,7 +587,7 @@ #address-cells = <1>; #size-cells = <0>; compatible = "intel,ich9-spi"; - spi-flash@0 { + fwstore_spi: spi-flash@0 { u-boot,dm-pre-reloc; #size-cells = <1>; #address-cells = <1>; @@ -670,6 +676,10 @@ u-boot,dm-pre-reloc; reg = <0xfed40000 0x5000>; compatible = "infineon,slb9635lpc"; + secdata { + u-boot,dm-pre-reloc; + compatible = "google,tpm-secdata"; + }; }; microcode { @@ -693,3 +703,13 @@ }; }; + +&rtc { + #address-cells = <1>; + #size-cells = <0>; + nvdata { + u-boot,dm-pre-reloc; + compatible = "google,cmos-nvdata"; + reg = <0x26>; + }; +}; |