summaryrefslogtreecommitdiff
path: root/arch/x86/cpu/turbo.c
diff options
context:
space:
mode:
authorSimon Glass <sjg@chromium.org>2019-09-25 08:56:39 -0600
committerBin Meng <bmeng.cn@gmail.com>2019-10-08 13:57:47 +0800
commitf6d00da459694a42c1de1e42b159595e2f5ad56f (patch)
treeefa0ef73ce868ce3c99a3d35f1cc2fbfafd2906f /arch/x86/cpu/turbo.c
parent2f0c2f03e71a68d7e5d8770c10d0154ead6dd104 (diff)
x86: Tidy up some duplicate MSR defines
Some MSR registers are defined twice in different parts of the file. Move them together and remove the duplicates. Also drop some thermal defines which are not used. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Diffstat (limited to 'arch/x86/cpu/turbo.c')
-rw-r--r--arch/x86/cpu/turbo.c10
1 files changed, 5 insertions, 5 deletions
diff --git a/arch/x86/cpu/turbo.c b/arch/x86/cpu/turbo.c
index a41d511238..be468d2b2c 100644
--- a/arch/x86/cpu/turbo.c
+++ b/arch/x86/cpu/turbo.c
@@ -60,8 +60,8 @@ int turbo_get_state(void)
cpuid_regs = cpuid(CPUID_LEAF_PM);
turbo_cap = !!(cpuid_regs.eax & PM_CAP_TURBO_MODE);
- msr = msr_read(MSR_IA32_MISC_ENABLES);
- turbo_en = !(msr.hi & H_MISC_DISABLE_TURBO);
+ msr = msr_read(MSR_IA32_MISC_ENABLE);
+ turbo_en = !(msr.hi & MISC_DISABLE_TURBO);
if (!turbo_cap && turbo_en) {
/* Unavailable */
@@ -86,9 +86,9 @@ void turbo_enable(void)
/* Only possible if turbo is available but hidden */
if (turbo_get_state() == TURBO_DISABLED) {
/* Clear Turbo Disable bit in Misc Enables */
- msr = msr_read(MSR_IA32_MISC_ENABLES);
- msr.hi &= ~H_MISC_DISABLE_TURBO;
- msr_write(MSR_IA32_MISC_ENABLES, msr);
+ msr = msr_read(MSR_IA32_MISC_ENABLE);
+ msr.hi &= ~MISC_DISABLE_TURBO;
+ msr_write(MSR_IA32_MISC_ENABLE, msr);
/* Update cached turbo state */
set_global_turbo_state(TURBO_ENABLED);