diff options
author | Simon Glass <sjg@chromium.org> | 2014-11-12 22:42:07 -0700 |
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committer | Simon Glass <sjg@chromium.org> | 2014-11-21 07:34:11 +0100 |
commit | 8ef07571a0300e6ae84931c63d5eb3b2310c8aba (patch) | |
tree | 609c66ebe81b00690783e881a28c1bfb266670c2 /arch/x86/Kconfig | |
parent | c03c951b065f2b9f98caf913192a41a8f8200fd4 (diff) |
x86: Add chromebook_link board
This board is a 'bare' version of the existing 'link 'board. It does not
require coreboot to run, but is intended to start directly from the reset
vector.
This initial commit has place holders for a wide range of features. These
will be added in follow-on patches and series. So far it cannot be booted
as there is no ROM image produced, but it does build without errors.
Signed-off-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'arch/x86/Kconfig')
-rw-r--r-- | arch/x86/Kconfig | 23 |
1 files changed, 23 insertions, 0 deletions
diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig index 0dba8acbb2b..a5f24d00a69 100644 --- a/arch/x86/Kconfig +++ b/arch/x86/Kconfig @@ -12,9 +12,32 @@ choice config TARGET_COREBOOT bool "Support coreboot" + help + This target is used for running U-Boot on top of Coreboot. In + this case Coreboot does the early inititalisation, and U-Boot + takes over once the RAM, video and CPU are fully running. + U-Boot is loaded as a fallback payload from Coreboot, in + Coreboot terminology. This method was used for the Chromebook + Pixel when launched. + +config TARGET_CHROMEBOOK_LINK + bool "Support Chromebook link" + help + This is the Chromebook Pixel released in 2013. It uses an Intel + i5 Ivybridge which is a die-shrink of Sandybridge, with 4GB of + SDRAM. It has a Panther Point platform controller hub, PCIe + WiFi and Bluetooth. It also includes a 720p webcam, USB SD + reader, microphone and speakers, display port and 32GB SATA + solid state drive. There is a Chrome OS EC connected on LPC, + and it provides a 2560x1700 high resolution touch-enabled LCD + display. endchoice +source "arch/x86/cpu/ivybridge/Kconfig" + source "board/chromebook-x86/coreboot/Kconfig" +source "board/google/chromebook_link/Kconfig" + endmenu |