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authorSean Anderson <seanga2@gmail.com>2021-06-11 00:16:15 -0400
committerLeo Yu-Chi Liang <ycliang@andestech.com>2021-06-17 09:40:58 +0800
commit9cd637f84bc3dc60e0201012494982479621b5bd (patch)
treea0133032bc9c70cc556c5b1c6ab92563857d90e5 /arch/riscv
parent493110cc499539f42a2786e8306ba29ac0ba2435 (diff)
k210: dts: Set PLL1 to the same rate as PLL0
Linux has had some stability issues when using AISRAM with a different frequency from SRAM. Mirror their change here now that we relocate into AISRAM. Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Diffstat (limited to 'arch/riscv')
-rw-r--r--arch/riscv/dts/k210.dtsi2
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/riscv/dts/k210.dtsi b/arch/riscv/dts/k210.dtsi
index 2492af8038..8bcd3cebde 100644
--- a/arch/riscv/dts/k210.dtsi
+++ b/arch/riscv/dts/k210.dtsi
@@ -501,6 +501,8 @@
#clock-cells = <1>;
compatible = "kendryte,k210-clk";
clocks = <&in0>;
+ assigned-clocks = <&sysclk K210_CLK_PLL1>;
+ assigned-clock-rates = <390000000>;
u-boot,dm-pre-reloc;
};