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authorRick Chen <rick@andestech.com>2018-03-29 10:08:33 +0800
committerAndes <uboot@andestech.com>2018-03-30 13:13:56 +0800
commitd58717e42559189a226ea800173147399c8edef9 (patch)
treea94bffe91400f0486571454a3db56733899c4c7e /arch/riscv
parent2bc5bea9e160c7efe5a268a55b440ac8cf848b48 (diff)
riscv: ae250: Support DT provided by the board at runtime
Enable CONFIG_OF_BOAD to support delivery dtb to u-boot at run time instead of embedded. There are two methods to delivery dtb. 1 Pass from loader: When u-boot boot from RAM, gdb or loader can pass dtb via a2 to u-boot dynamically. Of course gdb or loader shall be in charge of dtb delivery. 2 Configure CONFIG_SYS_FDT_BASE: It can be configured as RAM or ROM base statically, no mater u-boot boot from RAM or ROM. If it was configured as ROM base, dtb can be burned into ROM(spi flash) by spi driver. Meanwhile remove CONFIG_SKIP_LOWLEVEL_INIT which is useless in nx25-ae250 configuration. Signed-off-by: Rick Chen <rick@andestech.com> Signed-off-by: Rick Chen <rickchen36@gmail.com> Cc: Greentime Hu <green.hu@gmail.com>
Diffstat (limited to 'arch/riscv')
-rw-r--r--arch/riscv/cpu/nx25/start.S2
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/riscv/cpu/nx25/start.S b/arch/riscv/cpu/nx25/start.S
index 6a076639d3..cd0a66360d 100644
--- a/arch/riscv/cpu/nx25/start.S
+++ b/arch/riscv/cpu/nx25/start.S
@@ -45,6 +45,8 @@ trap_vector:
.global trap_entry
handle_reset:
+ li t0, CONFIG_SYS_SDRAM_BASE
+ SREG a2, 0(t0)
la t0, trap_entry
csrw mtvec, t0
csrwi mstatus, 0