diff options
| author | Lukas Auer <lukas.auer@aisec.fraunhofer.de> | 2019-01-04 01:37:30 +0100 |
|---|---|---|
| committer | Andes <uboot@andestech.com> | 2019-01-15 09:36:31 +0800 |
| commit | f74c416e622cec35be95066fb7fcf4c27ac146e9 (patch) | |
| tree | 54964c44c72011e796d80faadf88c89d4d37195c /arch/riscv | |
| parent | c9056653ecd6dfedc5e9f00548f9f1c604a3a193 (diff) | |
riscv: use invalidate/flush_*cache_range functions in cache.c
The flush_cache() function in lib/cache.c ignores its arguments and
flushes the complete data and instruction caches. Use the
invalidate/flush_*cache_range() functions instead to only flush the
requested memory region.
This patch does not change the current behavior of U-Boot, since the
implementation of the invalidate/flush_*cache_range() functions flush
the complete data and instruction caches. It is in preparation for CPUs
with the necessary functionality for flushing a selectable memory range.
Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Diffstat (limited to 'arch/riscv')
| -rw-r--r-- | arch/riscv/lib/cache.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/riscv/lib/cache.c b/arch/riscv/lib/cache.c index 78b19da2c5..5437a122a1 100644 --- a/arch/riscv/lib/cache.c +++ b/arch/riscv/lib/cache.c @@ -40,8 +40,8 @@ void cache_flush(void) void flush_cache(unsigned long addr, unsigned long size) { - invalidate_icache_all(); - flush_dcache_all(); + invalidate_icache_range(addr, addr + size); + flush_dcache_range(addr, addr + size); } __weak void icache_enable(void) |