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authorRick Chen <rick@andestech.com>2019-04-02 15:56:40 +0800
committerAndes <uboot@andestech.com>2019-04-08 09:45:08 +0800
commita1f24875c346a1bf8940b793a27364631d9aabf7 (patch)
treed3117a234e71e0518a3f0589b4d21db3d00ca696 /arch/riscv/include
parent0d389468e2144f3ba3bdbc566c05c0c05dc14fc6 (diff)
riscv: Add a SYSCON driver for Andestech's PLMT
The platform-Level Machine Timer (PLMT) block holds memory-mapped mtime register associated with timer tick. This driver implements the riscv_get_time() which is required by the generic RISC-V timer driver. Signed-off-by: Rick Chen <rick@andestech.com> Cc: Greentime Hu <greentime@andestech.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Diffstat (limited to 'arch/riscv/include')
-rw-r--r--arch/riscv/include/asm/global_data.h3
-rw-r--r--arch/riscv/include/asm/syscon.h1
2 files changed, 4 insertions, 0 deletions
diff --git a/arch/riscv/include/asm/global_data.h b/arch/riscv/include/asm/global_data.h
index b86791094bb..dffcd45bf01 100644
--- a/arch/riscv/include/asm/global_data.h
+++ b/arch/riscv/include/asm/global_data.h
@@ -21,6 +21,9 @@ struct arch_global_data {
#ifdef CONFIG_ANDES_PLIC
void __iomem *plic; /* plic base address */
#endif
+#ifdef CONFIG_ANDES_PLMT
+ void __iomem *plmt; /* plmt base address */
+#endif
#ifdef CONFIG_SMP
struct ipi_data ipi[CONFIG_NR_CPUS];
#endif
diff --git a/arch/riscv/include/asm/syscon.h b/arch/riscv/include/asm/syscon.h
index a0862082612..26a008ca599 100644
--- a/arch/riscv/include/asm/syscon.h
+++ b/arch/riscv/include/asm/syscon.h
@@ -13,6 +13,7 @@ enum {
RISCV_NONE,
RISCV_SYSCON_CLINT, /* Core Local Interruptor (CLINT) */
RISCV_SYSCON_PLIC, /* Platform Level Interrupt Controller (PLIC) */
+ RISCV_SYSCON_PLMT, /* Platform Level Machine Timer (PLMT) */
};
#endif /* _ASM_SYSCON_H */