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| author | Tom Rini <trini@konsulko.com> | 2020-10-05 13:05:46 -0400 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2020-10-05 14:10:59 -0400 |
| commit | b7e7831e5d5be047f421ddc1f308afc22764a893 (patch) | |
| tree | 7d5f27c82b260278ed0b3ea96bce592b0505b898 /arch/riscv/cpu/cpu.c | |
| parent | 050acee119b3757fee3bd128f55d720fdd9bb890 (diff) | |
| parent | caebff09efe8c061b4d99b82262c67fb2db9bbcf (diff) | |
Merge branch 'next'
Bring in the assorted changes that have been staged in the 'next' branch
prior to release.
Signed-off-by: Tom Rini <trini@konsulko.com>
Diffstat (limited to 'arch/riscv/cpu/cpu.c')
| -rw-r--r-- | arch/riscv/cpu/cpu.c | 20 |
1 files changed, 20 insertions, 0 deletions
diff --git a/arch/riscv/cpu/cpu.c b/arch/riscv/cpu/cpu.c index bfa2d4a4269..85592f5bee2 100644 --- a/arch/riscv/cpu/cpu.c +++ b/arch/riscv/cpu/cpu.c @@ -72,6 +72,17 @@ static int riscv_cpu_probe(void) return 0; } +/* + * This is called on secondary harts just after the IPI is init'd. Currently + * there's nothing to do, since we just need to clear any existing IPIs, and + * that is handled by the sending of an ipi itself. + */ +#if CONFIG_IS_ENABLED(SMP) +static void dummy_pending_ipi_clear(ulong hart, ulong arg0, ulong arg1) +{ +} +#endif + int arch_cpu_init_dm(void) { int ret; @@ -111,6 +122,15 @@ int arch_cpu_init_dm(void) ret = riscv_init_ipi(); if (ret) return ret; + + /* + * Clear all pending IPIs on secondary harts. We don't do anything on + * the boot hart, since we never send an IPI to ourselves, and no + * interrupts are enabled + */ + ret = smp_call_function((ulong)dummy_pending_ipi_clear, 0, 0, 0); + if (ret) + return ret; #endif return 0; |