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authorPaulo Zaneti <paulo.zaneti@datacom.ind.br>2017-05-05 11:08:18 -0300
committerYork Sun <york.sun@nxp.com>2017-05-15 09:48:49 -0700
commitfbe44dd1aae749255bcd7e458d4a91cac4181994 (patch)
treefe9de27a9734964e62b013042e6f4e1c93c0b22e /arch/powerpc
parent22f3368e71321db1e0e15dfbf54b052367890ec7 (diff)
powerpc: t1024: Fix SRDS_MAX_LANES value
T1023 and T1024 have 4 SerDes lanes. Fix macro SRDS_MAX_LANES and use this macro instead of hard-coded value in t1024_serdes.c. Signed-off-by: Paulo Zaneti <paulo.zaneti@datacom.ind.br> Signed-off-by: York Sun <york.sun@nxp.com>
Diffstat (limited to 'arch/powerpc')
-rw-r--r--arch/powerpc/cpu/mpc85xx/t1024_serdes.c4
-rw-r--r--arch/powerpc/include/asm/immap_85xx.h4
2 files changed, 6 insertions, 2 deletions
diff --git a/arch/powerpc/cpu/mpc85xx/t1024_serdes.c b/arch/powerpc/cpu/mpc85xx/t1024_serdes.c
index 2ba314a7f6..7c4519e4a4 100644
--- a/arch/powerpc/cpu/mpc85xx/t1024_serdes.c
+++ b/arch/powerpc/cpu/mpc85xx/t1024_serdes.c
@@ -10,7 +10,7 @@
#include <asm/io.h>
-static u8 serdes_cfg_tbl[][4] = {
+static u8 serdes_cfg_tbl[][SRDS_MAX_LANES] = {
[0x40] = {PCIE1, PCIE1, PCIE1, PCIE1},
[0xD5] = {QSGMII_FM1_A, PCIE3, PCIE2, PCIE1},
[0xD6] = {QSGMII_FM1_A, PCIE3, PCIE2, SATA1},
@@ -45,7 +45,7 @@ int is_serdes_prtcl_valid(int serdes, u32 prtcl)
if (prtcl >= ARRAY_SIZE(serdes_cfg_tbl))
return 0;
- for (i = 0; i < 4; i++) {
+ for (i = 0; i < SRDS_MAX_LANES; i++) {
if (serdes_cfg_tbl[prtcl][i] != NONE)
return 1;
}
diff --git a/arch/powerpc/include/asm/immap_85xx.h b/arch/powerpc/include/asm/immap_85xx.h
index 762b174b2d..ee537f4ac9 100644
--- a/arch/powerpc/include/asm/immap_85xx.h
+++ b/arch/powerpc/include/asm/immap_85xx.h
@@ -2523,7 +2523,11 @@ typedef struct ccsr_gur {
#ifdef CONFIG_SYS_FSL_QORIQ_CHASSIS2
#define MAX_SERDES 4
+#if defined(CONFIG_ARCH_T1024) || defined(CONFIG_ARCH_T1023)
+#define SRDS_MAX_LANES 4
+#else
#define SRDS_MAX_LANES 8
+#endif
#define SRDS_MAX_BANK 2
typedef struct serdes_corenet {
struct {