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authorMichal Simek <michal.simek@xilinx.com>2018-06-13 08:56:31 +0200
committerTom Rini <trini@konsulko.com>2018-06-19 07:31:45 -0400
commit20b016a33665f7b3ff875b4b7063180eb955f092 (patch)
treee2b5bc68ecd9b0da8cba3122a9ab9f5b6f0129f6 /arch/powerpc
parent487b5fa6deb1f02843dbc9a9ac792bb38ef4d52a (diff)
common: Fix cpu nr type which is always unsigned type
cpu_cmd() is reading cpu number via simple_strtoul() which is always unsigned type. Platform code implementations are not expecting that nr can be negative and there is not checking in the code for that too. This patch is using u32 type for cpu number to make sure that platform code get proper value range. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Diffstat (limited to 'arch/powerpc')
-rw-r--r--arch/powerpc/cpu/mpc85xx/mp.c10
-rw-r--r--arch/powerpc/cpu/mpc86xx/mp.c8
2 files changed, 9 insertions, 9 deletions
diff --git a/arch/powerpc/cpu/mpc85xx/mp.c b/arch/powerpc/cpu/mpc85xx/mp.c
index 42501ca3ce..b0aa72ed6e 100644
--- a/arch/powerpc/cpu/mpc85xx/mp.c
+++ b/arch/powerpc/cpu/mpc85xx/mp.c
@@ -42,7 +42,7 @@ int hold_cores_in_reset(int verbose)
return 0;
}
-int cpu_reset(int nr)
+int cpu_reset(u32 nr)
{
volatile ccsr_pic_t *pic = (void *)(CONFIG_SYS_MPC8xxx_PIC_ADDR);
out_be32(&pic->pir, 1 << nr);
@@ -53,7 +53,7 @@ int cpu_reset(int nr)
return 0;
}
-int cpu_status(int nr)
+int cpu_status(u32 nr)
{
u32 *table, id = get_my_id();
@@ -79,7 +79,7 @@ int cpu_status(int nr)
}
#ifdef CONFIG_FSL_CORENET
-int cpu_disable(int nr)
+int cpu_disable(u32 nr)
{
volatile ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
@@ -95,7 +95,7 @@ int is_core_disabled(int nr) {
return (coredisrl & (1 << nr));
}
#else
-int cpu_disable(int nr)
+int cpu_disable(u32 nr)
{
volatile ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
@@ -137,7 +137,7 @@ static u8 boot_entry_map[4] = {
BOOT_ENTRY_R3_LOWER,
};
-int cpu_release(int nr, int argc, char * const argv[])
+int cpu_release(u32 nr, int argc, char * const argv[])
{
u32 i, val, *table = (u32 *)&__spin_table + nr * NUM_BOOT_ENTRY;
u64 boot_addr;
diff --git a/arch/powerpc/cpu/mpc86xx/mp.c b/arch/powerpc/cpu/mpc86xx/mp.c
index 97bd160df8..ce300eac5b 100644
--- a/arch/powerpc/cpu/mpc86xx/mp.c
+++ b/arch/powerpc/cpu/mpc86xx/mp.c
@@ -13,7 +13,7 @@
DECLARE_GLOBAL_DATA_PTR;
-int cpu_reset(int nr)
+int cpu_reset(u32 nr)
{
/* dummy function so common/cmd_mp.c will build
* should be implemented in the future, when cpu_release()
@@ -23,13 +23,13 @@ int cpu_reset(int nr)
return 1;
}
-int cpu_status(int nr)
+int cpu_status(u32 nr)
{
/* dummy function so common/cmd_mp.c will build */
return 0;
}
-int cpu_disable(int nr)
+int cpu_disable(u32 nr)
{
volatile immap_t *immap = (immap_t *) CONFIG_SYS_CCSRBAR;
volatile ccsr_gur_t *gur = &immap->im_gur;
@@ -66,7 +66,7 @@ int is_core_disabled(int nr) {
return 0;
}
-int cpu_release(int nr, int argc, char * const argv[])
+int cpu_release(u32 nr, int argc, char * const argv[])
{
/* dummy function so common/cmd_mp.c will build
* should be implemented in the future */