diff options
author | Kumar Gala <galak@kernel.crashing.org> | 2010-05-05 22:35:27 -0500 |
---|---|---|
committer | Kumar Gala <galak@kernel.crashing.org> | 2010-07-26 13:07:57 -0500 |
commit | fd3c9befa83eecf6e7c6ef03c501159fbf754143 (patch) | |
tree | 825bcfea93aea0ed8d270bd993262bab45982981 /arch/powerpc/cpu | |
parent | 61054ffa1690b2aef4e845c6aa071840b93abff6 (diff) |
powerpc/p4080: Add workaround for erratum CPU22
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'arch/powerpc/cpu')
-rw-r--r-- | arch/powerpc/cpu/mpc85xx/cmd_errata.c | 4 | ||||
-rw-r--r-- | arch/powerpc/cpu/mpc85xx/cpu_init.c | 7 | ||||
-rw-r--r-- | arch/powerpc/cpu/mpc85xx/release.S | 6 |
3 files changed, 16 insertions, 1 deletions
diff --git a/arch/powerpc/cpu/mpc85xx/cmd_errata.c b/arch/powerpc/cpu/mpc85xx/cmd_errata.c index 01c462c4b60..d73f3d7f148 100644 --- a/arch/powerpc/cpu/mpc85xx/cmd_errata.c +++ b/arch/powerpc/cpu/mpc85xx/cmd_errata.c @@ -44,7 +44,9 @@ static int do_errata(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) #if defined(CONFIG_SYS_P4080_ERRATUM_SERDES8) puts("Work-around for Erratum SERDES8 enabled\n"); #endif - +#if defined(CONFIG_SYS_P4080_ERRATUM_CPU22) + puts("Work-around for Erratum CPU22 enabled\n"); +#endif return 0; } diff --git a/arch/powerpc/cpu/mpc85xx/cpu_init.c b/arch/powerpc/cpu/mpc85xx/cpu_init.c index a90ebb10502..2c3be6dd090 100644 --- a/arch/powerpc/cpu/mpc85xx/cpu_init.c +++ b/arch/powerpc/cpu/mpc85xx/cpu_init.c @@ -32,6 +32,7 @@ #include <ioports.h> #include <sata.h> #include <asm/io.h> +#include <asm/cache.h> #include <asm/mmu.h> #include <asm/fsl_law.h> #include <asm/fsl_serdes.h> @@ -245,6 +246,12 @@ int cpu_init_r(void) volatile fsl_lbc_t *lbc = LBC_BASE_ADDR; #endif +#if defined(CONFIG_SYS_P4080_ERRATUM_CPU22) + flush_dcache(); + mtspr(L1CSR2, (mfspr(L1CSR2) | L1CSR2_DCWS)); + sync(); +#endif + puts ("L2: "); #if defined(CONFIG_L2_CACHE) diff --git a/arch/powerpc/cpu/mpc85xx/release.S b/arch/powerpc/cpu/mpc85xx/release.S index 0b5b9da032a..53cefaf002e 100644 --- a/arch/powerpc/cpu/mpc85xx/release.S +++ b/arch/powerpc/cpu/mpc85xx/release.S @@ -136,6 +136,12 @@ __secondary_start_page: mtspr L1CSR2,r8 #endif +#if defined(CONFIG_SYS_P4080_ERRATUM_CPU22) + mfspr r8,L1CSR2 + oris r8,r8,(L1CSR2_DCWS)@h + mtspr L1CSR2,r8 +#endif + #ifdef CONFIG_BACKSIDE_L2_CACHE /* Enable/invalidate the L2 cache */ msync |