diff options
| author | Minkyu Kang <mk7.kang@samsung.com> | 2012-12-10 13:44:41 +0900 |
|---|---|---|
| committer | Minkyu Kang <mk7.kang@samsung.com> | 2012-12-10 14:13:27 +0900 |
| commit | 2c601c7208713ba9b2158c57adcf515f4bdbc212 (patch) | |
| tree | 9f6e70f33565beceb956b98c261bee19731d50d2 /arch/powerpc/cpu/mpc85xx/release.S | |
| parent | b8a7c467960ffb4d5a5e1eef5f7783fb6f594542 (diff) | |
| parent | fd4d564b3c80b111f18c93adb14233a6a7ddb0e9 (diff) | |
Merge branch 'master' of git://git.denx.de/u-boot into resolve
Conflicts:
README
board/samsung/universal_c210/universal.c
drivers/misc/Makefile
drivers/power/power_fsl.c
include/configs/mx35pdk.h
include/configs/mx53loco.h
include/configs/seaboard.h
Diffstat (limited to 'arch/powerpc/cpu/mpc85xx/release.S')
| -rw-r--r-- | arch/powerpc/cpu/mpc85xx/release.S | 36 |
1 files changed, 34 insertions, 2 deletions
diff --git a/arch/powerpc/cpu/mpc85xx/release.S b/arch/powerpc/cpu/mpc85xx/release.S index 4ba44a9028..5c4b1e3b75 100644 --- a/arch/powerpc/cpu/mpc85xx/release.S +++ b/arch/powerpc/cpu/mpc85xx/release.S @@ -351,7 +351,13 @@ __secondary_reset_vector: .align L1_CACHE_SHIFT .global __second_half_boot_page __second_half_boot_page: -#define EPAPR_MAGIC 0x45504150 +#ifdef CONFIG_PPC_SPINTABLE_COMPATIBLE + lis r3,(spin_table_compat - __second_half_boot_page)@h + ori r3,r3,(spin_table_compat - __second_half_boot_page)@l + add r3,r3,r11 /* r11 has the address of __second_half_boot_page */ + lwz r14,0(r3) +#endif + #define ENTRY_ADDR_UPPER 0 #define ENTRY_ADDR_LOWER 4 #define ENTRY_R3_UPPER 8 @@ -383,7 +389,24 @@ __second_half_boot_page: stw r8,ENTRY_ADDR_LOWER(r10) /* spin waiting for addr */ -3: lwz r4,ENTRY_ADDR_LOWER(r10) +3: +/* + * To comply with ePAPR 1.1, the spin table has been moved to cache-enabled + * memory. Old OS may not work with this change. A patch is waiting to be + * accepted for Linux kernel. Other OS needs similar fix to spin table. + * For OSes with old spin table code, we can enable this temporary fix by + * setting environmental variable "spin_table_compat". For new OSes, set + * "spin_table_compat=no". After Linux is fixed, we can remove this macro + * and related code. For now, it is enabled by default. + */ +#ifdef CONFIG_PPC_SPINTABLE_COMPATIBLE + cmpwi r14,0 + beq 4f + dcbf 0, r10 + sync +4: +#endif + lwz r4,ENTRY_ADDR_LOWER(r10) andi. r11,r4,1 bne 3b isync @@ -460,5 +483,14 @@ __second_half_boot_page: .globl __spin_table __spin_table: .space CONFIG_MAX_CPUS*ENTRY_SIZE + +#ifdef CONFIG_PPC_SPINTABLE_COMPATIBLE + .align L1_CACHE_SHIFT + .global spin_table_compat +spin_table_compat: + .long 1 + +#endif + __spin_table_end: .space 4096 - (__spin_table_end - __spin_table) |