diff options
author | Kumar Gala <galak@kernel.crashing.org> | 2010-05-05 22:35:27 -0500 |
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committer | Kumar Gala <galak@kernel.crashing.org> | 2010-07-26 13:07:57 -0500 |
commit | fd3c9befa83eecf6e7c6ef03c501159fbf754143 (patch) | |
tree | 825bcfea93aea0ed8d270bd993262bab45982981 /arch/powerpc/cpu/mpc85xx/release.S | |
parent | 61054ffa1690b2aef4e845c6aa071840b93abff6 (diff) |
powerpc/p4080: Add workaround for erratum CPU22
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'arch/powerpc/cpu/mpc85xx/release.S')
-rw-r--r-- | arch/powerpc/cpu/mpc85xx/release.S | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/arch/powerpc/cpu/mpc85xx/release.S b/arch/powerpc/cpu/mpc85xx/release.S index 0b5b9da032a..53cefaf002e 100644 --- a/arch/powerpc/cpu/mpc85xx/release.S +++ b/arch/powerpc/cpu/mpc85xx/release.S @@ -136,6 +136,12 @@ __secondary_start_page: mtspr L1CSR2,r8 #endif +#if defined(CONFIG_SYS_P4080_ERRATUM_CPU22) + mfspr r8,L1CSR2 + oris r8,r8,(L1CSR2_DCWS)@h + mtspr L1CSR2,r8 +#endif + #ifdef CONFIG_BACKSIDE_L2_CACHE /* Enable/invalidate the L2 cache */ msync |