diff options
author | Kim Phillips <kim.phillips@freescale.com> | 2010-05-14 13:18:54 -0500 |
---|---|---|
committer | Kim Phillips <kim.phillips@freescale.com> | 2010-05-17 14:44:25 -0500 |
commit | a4bfc4cc466473b97c7fe84bdf261b2935887e3f (patch) | |
tree | 8953a115f6e1aa76596adcabe7c86d0a9e5ca306 /arch/powerpc/cpu/mpc83xx/start.S | |
parent | e74244c5a1c8bcea9b047217277dcd3235a285f4 (diff) |
mpc83xx: fix NAND bootstrap too big error
commit 167cdad1372917bc11c636c359aad02625291fa9 "SERIAL: Enable
port-mapped access" inadvertently broke 83xx nand boards by
converting NS16550_init to use io accessors, which expanded
the size of the generated code.
this patch fixes the problem by removing icache functions from
the nand builds, which somewhat follows commit
1a2e203b31d33fb720f2cf1033b241ad36ab405a "mpc83xx: turn on icache
in core initialization to improve u-boot boot time"
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Diffstat (limited to 'arch/powerpc/cpu/mpc83xx/start.S')
-rw-r--r-- | arch/powerpc/cpu/mpc83xx/start.S | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/powerpc/cpu/mpc83xx/start.S b/arch/powerpc/cpu/mpc83xx/start.S index a7c80792ded..1b3d618f499 100644 --- a/arch/powerpc/cpu/mpc83xx/start.S +++ b/arch/powerpc/cpu/mpc83xx/start.S @@ -739,6 +739,7 @@ setup_bats: * Note: requires that all cache bits in * HID0 are in the low half word. */ +#ifndef CONFIG_NAND_SPL .globl icache_enable icache_enable: mfspr r3, HID0 @@ -767,6 +768,7 @@ icache_status: mfspr r3, HID0 rlwinm r3, r3, (31 - HID0_ICE_SHIFT + 1), 31, 31 blr +#endif /* !CONFIG_NAND_SPL */ .globl dcache_enable dcache_enable: |