summaryrefslogtreecommitdiff
path: root/arch/powerpc/cpu/mpc83xx/speed.c
diff options
context:
space:
mode:
authorIlya Yanok <yanok@emcraft.com>2010-06-28 16:44:33 +0400
committerKim Phillips <kim.phillips@freescale.com>2010-07-09 15:00:54 -0500
commit7c619ddceebc6bf85ee05c705f02691f581bc282 (patch)
tree2c179ba44eb09c3241f85266eda5a3dce114caaf /arch/powerpc/cpu/mpc83xx/speed.c
parent54841ab50c20d6fa6c9cc3eb826989da3a22d934 (diff)
mpc8308: support for Freescale MPC8308 cpu
This patch adds basic support for Freescale MPC8308 CPU. Serial ports, NOR flash and integrated Ethernet controllers are supported. PCI Express is also supported. eSDHC, NAND and USB may work but aren't tested (using ULPI PHY requires additional patch). Signed-off-by: Ilya Yanok <yanok@emcraft.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Diffstat (limited to 'arch/powerpc/cpu/mpc83xx/speed.c')
-rw-r--r--arch/powerpc/cpu/mpc83xx/speed.c23
1 files changed, 15 insertions, 8 deletions
diff --git a/arch/powerpc/cpu/mpc83xx/speed.c b/arch/powerpc/cpu/mpc83xx/speed.c
index b5076a9af8..d04b192599 100644
--- a/arch/powerpc/cpu/mpc83xx/speed.c
+++ b/arch/powerpc/cpu/mpc83xx/speed.c
@@ -100,7 +100,8 @@ int get_clocks(void)
u32 lcrr;
u32 csb_clk;
-#if defined(CONFIG_MPC834x) || defined(CONFIG_MPC831x) || defined(CONFIG_MPC837x)
+#if defined(CONFIG_MPC8308) || defined(CONFIG_MPC831x) || \
+ defined(CONFIG_MPC834x) || defined(CONFIG_MPC837x)
u32 tsec1_clk;
u32 tsec2_clk;
u32 usbdr_clk;
@@ -132,7 +133,8 @@ int get_clocks(void)
u32 qe_clk;
u32 brg_clk;
#endif
-#if defined(CONFIG_MPC837x) || defined(CONFIG_MPC831x)
+#if defined(CONFIG_MPC8308) || defined(CONFIG_MPC831x) || \
+ defined(CONFIG_MPC837x)
u32 pciexp1_clk;
u32 pciexp2_clk;
#endif
@@ -164,7 +166,8 @@ int get_clocks(void)
sccr = im->clk.sccr;
-#if defined(CONFIG_MPC834x) || defined(CONFIG_MPC831x) || defined(CONFIG_MPC837x)
+#if defined(CONFIG_MPC8308) || defined(CONFIG_MPC831x) || \
+ defined(CONFIG_MPC834x) || defined(CONFIG_MPC837x)
switch ((sccr & SCCR_TSEC1CM) >> SCCR_TSEC1CM_SHIFT) {
case 0:
tsec1_clk = 0;
@@ -202,7 +205,8 @@ int get_clocks(void)
}
#endif
-#if defined(CONFIG_MPC834x) || defined(CONFIG_MPC837x) || defined(CONFIG_MPC8315)
+#if defined(CONFIG_MPC8308) || defined(CONFIG_MPC8315) || \
+ defined(CONFIG_MPC834x) || defined(CONFIG_MPC837x)
switch ((sccr & SCCR_TSEC2CM) >> SCCR_TSEC2CM_SHIFT) {
case 0:
tsec2_clk = 0;
@@ -319,7 +323,7 @@ int get_clocks(void)
i2c1_clk = csb_clk;
#elif defined(CONFIG_MPC832x)
i2c1_clk = enc_clk;
-#elif defined(CONFIG_MPC831x)
+#elif defined(CONFIG_MPC8308) || defined(CONFIG_MPC831x)
i2c1_clk = enc_clk;
#elif defined(CONFIG_FSL_ESDHC)
i2c1_clk = sdhc_clk;
@@ -328,7 +332,8 @@ int get_clocks(void)
i2c2_clk = csb_clk; /* i2c-2 clk is equal to csb clk */
#endif
-#if defined(CONFIG_MPC837x) || defined(CONFIG_MPC831x)
+#if defined(CONFIG_MPC8308) || defined(CONFIG_MPC831x) || \
+ defined(CONFIG_MPC837x)
switch ((sccr & SCCR_PCIEXP1CM) >> SCCR_PCIEXP1CM_SHIFT) {
case 0:
pciexp1_clk = 0;
@@ -444,7 +449,8 @@ int get_clocks(void)
#endif
gd->csb_clk = csb_clk;
-#if defined(CONFIG_MPC834x) || defined(CONFIG_MPC831x) || defined(CONFIG_MPC837x)
+#if defined(CONFIG_MPC8308) || defined(CONFIG_MPC831x) || \
+ defined(CONFIG_MPC834x) || defined(CONFIG_MPC837x)
gd->tsec1_clk = tsec1_clk;
gd->tsec2_clk = tsec2_clk;
gd->usbdr_clk = usbdr_clk;
@@ -525,7 +531,8 @@ int do_clocks (cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
#if defined(CONFIG_FSL_ESDHC)
printf(" SDHC: %-4s MHz\n", strmhz(buf, gd->sdhc_clk));
#endif
-#if defined(CONFIG_MPC834x) || defined(CONFIG_MPC831x) || defined(CONFIG_MPC837x)
+#if defined(CONFIG_MPC8308) || defined(CONFIG_MPC831x) || \
+ defined(CONFIG_MPC834x) || defined(CONFIG_MPC837x)
printf(" TSEC1: %-4s MHz\n", strmhz(buf, gd->tsec1_clk));
printf(" TSEC2: %-4s MHz\n", strmhz(buf, gd->tsec2_clk));
printf(" USB DR: %-4s MHz\n", strmhz(buf, gd->usbdr_clk));