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| author | Stefan Roese <sr@denx.de> | 2020-06-30 12:33:19 +0200 |
|---|---|---|
| committer | Daniel Schwierzeck <daniel.schwierzeck@gmail.com> | 2020-07-18 14:23:25 +0200 |
| commit | 60a0559b7fe9bdb9433dc39c42e3e12c4363d63e (patch) | |
| tree | 8c7515c6a63ddba9db1737de0e4fddcbc7944b66 /arch/mips | |
| parent | 1d4ba15c6fe1265c5964cce3436fd501b14bae3b (diff) | |
mips: cache: Make invalidate_dcache_range() weak to enable overwrite
This patch adds __weak to invalidate_dcache_range() in lib/cache.c. This
makes it possible to overwrite this function by a platforms specific
version, which will be done for Octeon.
Signed-off-by: Stefan Roese <sr@denx.de>
Diffstat (limited to 'arch/mips')
| -rw-r--r-- | arch/mips/lib/cache.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/mips/lib/cache.c b/arch/mips/lib/cache.c index ad37f05802..cf29994a7a 100644 --- a/arch/mips/lib/cache.c +++ b/arch/mips/lib/cache.c @@ -159,7 +159,7 @@ void __weak flush_dcache_range(ulong start_addr, ulong stop) sync(); } -void invalidate_dcache_range(ulong start_addr, ulong stop) +void __weak invalidate_dcache_range(ulong start_addr, ulong stop) { unsigned long lsize = dcache_line_size(); unsigned long slsize = scache_line_size(); |