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| author | Michal Simek <michal.simek@xilinx.com> | 2014-01-21 07:30:37 +0100 |
|---|---|---|
| committer | Michal Simek <michal.simek@xilinx.com> | 2014-02-04 16:39:50 +0100 |
| commit | 9d24274509cdd463992dc1fb1a2820d6a4b6d21d (patch) | |
| tree | aa599f1c017ae0a597daf3394e8a45ed3192396d /arch/microblaze/cpu/timer.c | |
| parent | 22ff7f4d195b49ca7db5b2a0c3aa2c987ab88c34 (diff) | |
microblaze: Add SPL support
Add support for U-BOOT SPL. NOR and RAM mode are supported.
There are 3 images in NOR flash. u-boot.img, dtb and kernel.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Diffstat (limited to 'arch/microblaze/cpu/timer.c')
| -rw-r--r-- | arch/microblaze/cpu/timer.c | 8 |
1 files changed, 7 insertions, 1 deletions
diff --git a/arch/microblaze/cpu/timer.c b/arch/microblaze/cpu/timer.c index 69ae6d4d87..3960bbb08a 100644 --- a/arch/microblaze/cpu/timer.c +++ b/arch/microblaze/cpu/timer.c @@ -34,6 +34,7 @@ void __udelay(unsigned long usec) } } +#ifndef CONFIG_SPL_BUILD static void timer_isr(void *arg) { timestamp++; @@ -62,10 +63,15 @@ int timer_init (void) if (ret) tmr = NULL; } - /* No problem if timer is not found/initialized */ return 0; } +#else +int timer_init(void) +{ + return 0; +} +#endif /* * This function is derived from PowerPC code (read timebase as long long). |