diff options
author | Alison Wang <b18965@freescale.com> | 2012-10-18 19:25:51 +0000 |
---|---|---|
committer | jason <jason@jason-ThinkPad-T61.(none)> | 2012-10-24 22:27:46 +0800 |
commit | 45370e1836dc0a7ac8e1d4828924e971d01fd92a (patch) | |
tree | 08ea830b2548a56c2bc60e0b0fdf332fa45df08a /arch/m68k/include/asm/immap.h | |
parent | 7adbd11e78518c21b4ea363b8a74b224c8ae8967 (diff) |
ColdFire: Add MCF5441x CPU support
Add MCF5441x CPU support.
The MCF5441x devices are a family of highly-integrated 32-bit
microprocessors based on the Version 4m ColdFire microarchitecture,
comprising of the V4 integer core, memory management unit(MMU) and
enchanced multiply-accumulate unit(EMAC).
Signed-off-by: TsiChung Liew <tsicliew@gmail.com>
Signed-off-by: Jason Jin <Jason.jin@freescale.com>
Signed-off-by: Alison Wang <b18965@freescale.com>
Diffstat (limited to 'arch/m68k/include/asm/immap.h')
-rw-r--r-- | arch/m68k/include/asm/immap.h | 43 |
1 files changed, 42 insertions, 1 deletions
diff --git a/arch/m68k/include/asm/immap.h b/arch/m68k/include/asm/immap.h index e83ce08d576..2aab463a90f 100644 --- a/arch/m68k/include/asm/immap.h +++ b/arch/m68k/include/asm/immap.h @@ -1,7 +1,7 @@ /* * ColdFire Internal Memory Map and Defines * - * Copyright (C) 2004-2007 Freescale Semiconductor, Inc. + * Copyright 2004-2012 Freescale Semiconductor, Inc. * TsiChung Liew (Tsi-Chung.Liew@freescale.com) * * See file CREDITS for list of people who contributed to this @@ -318,6 +318,47 @@ #define CONFIG_SYS_NUM_IRQS (128) #endif /* CONFIG_M5329 && CONFIG_M5373 */ +#if defined(CONFIG_M54418) +#include <asm/immap_5441x.h> +#include <asm/m5441x.h> + +#define CONFIG_SYS_FEC0_IOBASE (MMAP_FEC0) +#define CONFIG_SYS_FEC1_IOBASE (MMAP_FEC1) + +#if (CONFIG_SYS_UART_PORT < 4) +#define CONFIG_SYS_UART_BASE (MMAP_UART0 + \ + (CONFIG_SYS_UART_PORT * 0x4000)) +#else +#define CONFIG_SYS_UART_BASE (MMAP_UART4 + \ + ((CONFIG_SYS_UART_PORT - 4) * 0x4000)) +#endif + +#define MMAP_DSPI MMAP_DSPI0 +#define CONFIG_SYS_MCFRTC_BASE (MMAP_RTC) + +/* Timer */ +#ifdef CONFIG_MCFTMR +#define CONFIG_SYS_UDELAY_BASE (MMAP_DTMR0) +#define CONFIG_SYS_TMR_BASE (MMAP_DTMR1) +#define CONFIG_SYS_TMRPND_REG (((int0_t *)(CONFIG_SYS_INTR_BASE))->iprh0) +#define CONFIG_SYS_TMRINTR_NO (INT0_HI_DTMR1) +#define CONFIG_SYS_TMRINTR_MASK (INTC_IPRH_INT33) +#define CONFIG_SYS_TMRINTR_PEND (CONFIG_SYS_TMRINTR_MASK) +#define CONFIG_SYS_TMRINTR_PRI (6) +#define CONFIG_SYS_TIMER_PRESCALER (((gd->bus_clk / 1000000) - 1) << 8) +#endif + +#ifdef CONFIG_MCFPIT +#define CONFIG_SYS_UDELAY_BASE (MMAP_PIT0) +#define CONFIG_SYS_PIT_BASE (MMAP_PIT1) +#define CONFIG_SYS_PIT_PRESCALE (6) +#endif + +#define CONFIG_SYS_INTR_BASE (MMAP_INTC0) +#define CONFIG_SYS_NUM_IRQS (128) + +#endif /* CONFIG_M54418 */ + #if defined(CONFIG_M54451) || defined(CONFIG_M54455) #include <asm/immap_5445x.h> #include <asm/m5445x.h> |