summaryrefslogtreecommitdiff
path: root/arch/arm
diff options
context:
space:
mode:
authorTom Rini <trini@konsulko.com>2022-06-17 16:24:31 -0400
committerTom Rini <trini@konsulko.com>2022-07-05 17:04:01 -0400
commit540b73a7be6dbe87a2f0c9e86d1d9178bc7f7b76 (patch)
tree385c030563255fa047dead780462c8b66492fbba /arch/arm
parent601483ffd544f98023062949670e2aa048d31cc7 (diff)
arch/Kconfig.nxp: Re-organize slightly
Make all of the CHAIN_OF_TRUST options be under a single menu and add a comment for the rest, so the resulting config file reads more clearly. Remove duplicate CHAIN_OF_TRUST options from board/congatec/common/Kconfig. Remove duplicate NXP_ESBC config questions and move to arch/Kconfig.nxp. Signed-off-by: Tom Rini <trini@konsulko.com>
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/cpu/armv7/ls102xa/Kconfig6
-rw-r--r--arch/arm/cpu/armv8/fsl-layerscape/Kconfig15
2 files changed, 5 insertions, 16 deletions
diff --git a/arch/arm/cpu/armv7/ls102xa/Kconfig b/arch/arm/cpu/armv7/ls102xa/Kconfig
index c496e64391..a901360fa7 100644
--- a/arch/arm/cpu/armv7/ls102xa/Kconfig
+++ b/arch/arm/cpu/armv7/ls102xa/Kconfig
@@ -41,12 +41,6 @@ config MAX_CPUS
cores, count the reserved ports. This will allocate enough memory
in spin table to properly handle all cores.
-config NXP_ESBC
- bool "NXP_ESBC"
- help
- Enable Freescale Secure Boot feature. Normally selected
- by defconfig. If unsure, do not change.
-
config SYS_CCI400_OFFSET
hex "Offset for CCI400 base"
depends on SYS_FSL_HAS_CCI400
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
index 7f08733a35..602b624dca 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
+++ b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
@@ -26,7 +26,7 @@ config ARCH_LS1012A
config ARCH_LS1028A
bool
select ARMV8_SET_SMPEN
- select ESBC_HDR_LS
+ select ESBC_HDR_LS if CHAIN_OF_TRUST
select FSL_LAYERSCAPE
select FSL_LSCH3
select GICV3
@@ -139,7 +139,7 @@ config ARCH_LS1088A
bool
select ARMV8_SET_SMPEN
select ARM_ERRATA_855873 if !TFABOOT
- select ESBC_HDR_LS
+ select ESBC_HDR_LS if CHAIN_OF_TRUST
select FSL_IFC
select FSL_LAYERSCAPE
select FSL_LSCH3
@@ -189,7 +189,7 @@ config ARCH_LS2080A
select ARM_ERRATA_828024
select ARM_ERRATA_829520
select ARM_ERRATA_833471
- select ESBC_HDR_LS
+ select ESBC_HDR_LS if CHAIN_OF_TRUST
select FSL_IFC
select FSL_LAYERSCAPE
select FSL_LSCH3
@@ -242,7 +242,7 @@ config ARCH_LS2080A
config ARCH_LX2162A
bool
select ARMV8_SET_SMPEN
- select ESBC_HDR_LS
+ select ESBC_HDR_LS if CHAIN_OF_TRUST
select FSL_DDR_BIST
select FSL_DDR_INTERACTIVE
select FSL_LAYERSCAPE
@@ -281,7 +281,7 @@ config ARCH_LX2162A
config ARCH_LX2160A
bool
select ARMV8_SET_SMPEN
- select ESBC_HDR_LS
+ select ESBC_HDR_LS if CHAIN_OF_TRUST
select FSL_DDR_BIST
select FSL_DDR_INTERACTIVE
select FSL_LAYERSCAPE
@@ -461,11 +461,6 @@ config EMC2305
Enable the EMC2305 fan controller for configuration of fan
speed.
-config NXP_ESBC
- bool "NXP_ESBC"
- help
- Enable Freescale Secure Boot feature
-
config QSPI_AHB_INIT
bool "Init the QSPI AHB bus"
help