summaryrefslogtreecommitdiff
path: root/arch/arm
diff options
context:
space:
mode:
authorYe Li <ye.li@nxp.com>2022-07-08 15:27:36 +0800
committerYe Li <ye.li@nxp.com>2022-07-18 13:54:03 +0800
commitcca8909347ede3e87b6c1b5d83b3d91ba59e5d1c (patch)
tree515c4644f189c69882a25c9fa8089c0e75cf555b /arch/arm
parentf1d88d3acef14e839d03954410028b0950d9716a (diff)
MLK-25979-1 imx8ulp: soc: Get chip revision from Sentinel
In both SPL and u-boot, after probing the S400 MU, get the chip revision, lifecycle and UID from Sentinel. Update get_cpu_rev to use the chip revision not hard coded it for A0 Signed-off-by: Ye Li <ye.li@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com>
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/mach-imx/imx8ulp/soc.c23
1 files changed, 22 insertions, 1 deletions
diff --git a/arch/arm/mach-imx/imx8ulp/soc.c b/arch/arm/mach-imx/imx8ulp/soc.c
index 46b9bb3c03..708414c33d 100644
--- a/arch/arm/mach-imx/imx8ulp/soc.c
+++ b/arch/arm/mach-imx/imx8ulp/soc.c
@@ -152,9 +152,18 @@ int board_usb_gadget_port_auto(void)
}
#endif
+static void set_cpu_info(struct sentinel_get_info_data *info)
+{
+ gd->arch.soc_rev = info->soc;
+ gd->arch.lifecycle = info->lc;
+ memcpy((void *)&gd->arch.uid, &info->uid, 4 * sizeof(u32));
+}
+
u32 get_cpu_rev(void)
{
- return (MXC_CPU_IMX8ULP << 12) | CHIP_REV_1_0;
+ u32 rev = (gd->arch.soc_rev >> 24) - 0xa0;
+
+ return (MXC_CPU_IMX8ULP << 12) | (CHIP_REV_1_0 + rev);
}
enum bt_mode get_boot_mode(void)
@@ -760,6 +769,8 @@ int arch_cpu_init_dm(void)
{
struct udevice *devp;
int node, ret;
+ u32 res;
+ struct sentinel_get_info_data info;
node = fdt_node_offset_by_compatible(gd->fdt_blob, -1, "fsl,imx8ulp-mu");
@@ -769,6 +780,16 @@ int arch_cpu_init_dm(void)
return ret;
}
+ ret = ahab_get_info(&info, &res);
+ if (ret) {
+ printf("ahab_get_info failed %d\n", ret);
+ /* fallback to A0.1 revision */
+ memset((void *)&info, 0, sizeof(struct sentinel_get_info_data));
+ info.soc = 0xa000084d;
+ }
+
+ set_cpu_info(&info);
+
return 0;
}