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authorYe Li <ye.li@nxp.com>2021-10-11 12:02:10 +0800
committerYe Li <ye.li@nxp.com>2022-07-06 22:35:54 +0800
commit42f600e64b985446f108394a5811b296c95322f7 (patch)
tree7be96027aefe5b473ac3684d1f29e113fff8b98d /arch/arm
parent0daf23a3d45c6da3f5433389dd0a0b622fad19c3 (diff)
LFU-330-9 arm: imx9: Add watchdog init
Disable all 3 wdogs on AIPS2 and unmask SRC reset trigger for WDOG3-5 Signed-off-by: Ye Li <ye.li@nxp.com>
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/include/asm/arch-imx9/imx-regs.h4
-rw-r--r--arch/arm/mach-imx/imx9/soc.c53
2 files changed, 48 insertions, 9 deletions
diff --git a/arch/arm/include/asm/arch-imx9/imx-regs.h b/arch/arm/include/asm/arch-imx9/imx-regs.h
index fd84905c7d..04a3c0b6ad 100644
--- a/arch/arm/include/asm/arch-imx9/imx-regs.h
+++ b/arch/arm/include/asm/arch-imx9/imx-regs.h
@@ -13,4 +13,8 @@
#define CCM_CCGR_BASE_ADDR 0x44458000UL
#define SYSCNT_CTRL_BASE_ADDR 0x44290000
+#define WDG3_BASE_ADDR 0x42490000UL
+#define WDG4_BASE_ADDR 0x424a0000UL
+#define WDG5_BASE_ADDR 0x424b0000UL
+
#endif
diff --git a/arch/arm/mach-imx/imx9/soc.c b/arch/arm/mach-imx/imx9/soc.c
index eeb8dc15e9..5dbef02482 100644
--- a/arch/arm/mach-imx/imx9/soc.c
+++ b/arch/arm/mach-imx/imx9/soc.c
@@ -34,6 +34,45 @@ u32 get_cpu_rev(void)
return (MXC_CPU_IMX93 << 12) | CHIP_REV_1_0;
}
+#define UNLOCK_WORD 0xD928C520 /* unlock word */
+#define REFRESH_WORD 0xB480A602 /* refresh word */
+
+static void disable_wdog(void __iomem *wdog_base)
+{
+ u32 val_cs = readl(wdog_base + 0x00);
+
+ if (!(val_cs & 0x80))
+ return;
+
+ /* default is 32bits cmd */
+ writel(REFRESH_WORD, (wdog_base + 0x04)); /* Refresh the CNT */
+
+ if (!(val_cs & 0x800)) {
+ writel(UNLOCK_WORD, (wdog_base + 0x04));
+ while (!(readl(wdog_base + 0x00) & 0x800))
+ ;
+ }
+ writel(0x0, (wdog_base + 0x0C)); /* Set WIN to 0 */
+ writel(0x400, (wdog_base + 0x08)); /* Set timeout to default 0x400 */
+ writel(0x2120, (wdog_base + 0x00)); /* Disable it and set update */
+
+ while (!(readl(wdog_base + 0x00) & 0x400))
+ ;
+}
+
+void init_wdog(void)
+{
+ u32 src_val;
+
+ disable_wdog((void __iomem *)WDG3_BASE_ADDR);
+ disable_wdog((void __iomem *)WDG4_BASE_ADDR);
+ disable_wdog((void __iomem *)WDG5_BASE_ADDR);
+
+ src_val = readl(0x54460018); /* reset mask */
+ src_val &= ~0x1c;
+ writel(src_val, 0x54460018);
+}
+
static struct mm_region imx93_mem_map[] = {
{
/* ROM */
@@ -82,14 +121,6 @@ int dram_init(void)
return 0;
}
-#if !CONFIG_IS_ENABLED(SYSRESET)
-void reset_cpu(ulong addr)
-{
- while (1) {
- }
-}
-#endif
-
int print_cpuinfo(void)
{
u32 cpurev;
@@ -114,8 +145,12 @@ int ft_system_setup(void *blob, struct bd_info *bd)
int arch_cpu_init(void)
{
- if (IS_ENABLED(CONFIG_SPL_BUILD))
+ if (IS_ENABLED(CONFIG_SPL_BUILD)) {
+ /* Disable wdog */
+ init_wdog();
+
clock_init();
+ }
return 0;
}