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authorAlex Marginean <alexm.osslist@gmail.com>2019-06-07 17:03:07 +0300
committerPrabhakar Kushwaha <prabhakar.kushwaha@nxp.com>2019-06-19 12:54:57 +0530
commit062d8148f8a6ed574a45f8b3096ba0226c4b5fca (patch)
treef96319485a34e0d80a9f006eabab5d530d127ed6 /arch/arm
parent0dd74ec2df8ca77b1264e82c3a9a17ef7e4c0f14 (diff)
arm: ls1028a: define the integrated PCI bus (ECAM)
LS1028A includes an integrated PCI bus with 11 PCI functions residing on bus 0. ECAM plus the device register space takes up 256MB of address space. Signed-off-by: Alex Marginean <alexm.osslist@gmail.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/dts/fsl-ls1028a.dtsi11
-rw-r--r--arch/arm/include/asm/arch-fsl-layerscape/cpu.h2
-rw-r--r--arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h3
3 files changed, 16 insertions, 0 deletions
diff --git a/arch/arm/dts/fsl-ls1028a.dtsi b/arch/arm/dts/fsl-ls1028a.dtsi
index 29a0858cea..49074112c4 100644
--- a/arch/arm/dts/fsl-ls1028a.dtsi
+++ b/arch/arm/dts/fsl-ls1028a.dtsi
@@ -108,6 +108,17 @@
0x82000000 0x0 0x40000000 0x88 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
};
+ pcie@1f0000000 {
+ compatible = "pci-host-ecam-generic";
+ /* ECAM bus 0, HW has more space reserved but not populated */
+ bus-range = <0x0 0x0>;
+ reg = <0x01 0xf0000000 0x0 0x100000>;
+ #address-cells = <3>;
+ #size-cells = <2>;
+ device_type = "pci";
+ ranges= <0x82000000 0x0 0x00000000 0x1 0xf8000000 0x0 0x160000>;
+ };
+
i2c0: i2c@2000000 {
compatible = "fsl,vf610-i2c";
#address-cells = <1>;
diff --git a/arch/arm/include/asm/arch-fsl-layerscape/cpu.h b/arch/arm/include/asm/arch-fsl-layerscape/cpu.h
index bdeb62576c..7759acdb8f 100644
--- a/arch/arm/include/asm/arch-fsl-layerscape/cpu.h
+++ b/arch/arm/include/asm/arch-fsl-layerscape/cpu.h
@@ -42,7 +42,9 @@
#else
#define CONFIG_SYS_PCIE1_PHYS_SIZE 0x800000000
#define CONFIG_SYS_PCIE2_PHYS_SIZE 0x800000000
+#ifndef CONFIG_SYS_PCIE3_PHYS_SIZE
#define CONFIG_SYS_PCIE3_PHYS_SIZE 0x800000000
+#endif
#define CONFIG_SYS_PCIE4_PHYS_SIZE 0x800000000
#define SYS_PCIE5_PHYS_SIZE 0x800000000
#define SYS_PCIE6_PHYS_SIZE 0x800000000
diff --git a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h
index 2b12e9f81a..ee9b33becf 100644
--- a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h
+++ b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h
@@ -186,6 +186,9 @@
#elif CONFIG_ARCH_LS1028A
#define CONFIG_SYS_PCIE1_PHYS_ADDR 0x8000000000ULL
#define CONFIG_SYS_PCIE2_PHYS_ADDR 0x8800000000ULL
+#define CONFIG_SYS_PCIE3_PHYS_ADDR 0x01f0000000ULL
+/* this is used by integrated PCI on LS1028, includes ECAM and register space */
+#define CONFIG_SYS_PCIE3_PHYS_SIZE 0x0010000000ULL
#else
#define CONFIG_SYS_PCIE1_PHYS_ADDR 0x1000000000ULL
#define CONFIG_SYS_PCIE2_PHYS_ADDR 0x1200000000ULL