Merge tag 'rpi-next-2019.10' of https://github.com/mbgg/u-boot

- fix mailbox status register used for polling
- fix bcm2835_sdhost to wait long enough for a transfer to complete
- increase kernel image size from 8 MB to 64 MB on arm64
- add support for RPi4
- add prefixes for raspberry pi related stuff to git-mailrc

6 files changed, 80 insertions, 25 deletions

diff --git a/arch/arm/mach-bcm283x/Kconfig b/arch/arm/mach-bcm283x/Kconfig
index 3eb5a9a897b..b08275f5989 100644
--- a/arch/arm/mach-bcm283x/Kconfig
+++ b/arch/arm/mach-bcm283x/Kconfig
@@ -26,6 +26,23 @@ config BCM2837_64B
 	select BCM2837
 	select ARM64
 
+config BCM2711
+	bool "Broadcom BCM2711 SoC support"
+	depends on ARCH_BCM283X
+
+config BCM2711_32B
+	bool "Broadcom BCM2711 SoC 32-bit support"
+	depends on ARCH_BCM283X
+	select BCM2711
+	select ARMV7_LPAE
+	select CPU_V7A
+
+config BCM2711_64B
+	bool "Broadcom BCM2711 SoC 64-bit support"
+	depends on ARCH_BCM283X
+	select BCM2711
+	select ARM64
+
 menu "Broadcom BCM283X family"
 	depends on ARCH_BCM283X
 
@@ -127,6 +144,50 @@ config TARGET_RPI_3
 	  This option creates a build targeting the ARMv8/AArch64 ISA.
 	select BCM2837_64B
 
+config TARGET_RPI_4_32B
+	bool "Raspberry Pi 4 32-bit build"
+	help
+	  Support for all BCM2711-based Raspberry Pi variants, such as
+	  the RPi 4 model B, in AArch32 (32-bit) mode.
+
+	  This option assumes the VideoCore firmware is configured to use the
+	  mini UART (rather than PL011) for the serial console. This is the
+	  default on the RPi 4. To enable the UART console, the following non-
+	  default option must be present in config.txt: enable_uart=1. This is
+	  required for U-Boot to operate correctly, even if you only care
+	  about the HDMI/usbkbd console.
+
+	  Due to hardware incompatibilities, this can't be used with
+	  BCM283/5/6/7.
+
+	  This option creates a build targeting the ARMv7/AArch32 ISA.
+	select BCM2711_32B
+
+config TARGET_RPI_4
+	bool "Raspberry Pi 4 64-bit build"
+	help
+	  Support for all BCM2711-based Raspberry Pi variants, such as
+	  the RPi 4 model B, in AArch64 (64-bit) mode.
+
+	  This option assumes the VideoCore firmware is configured to use the
+	  mini UART (rather than PL011) for the serial console. This is the
+	  default on the RPi 4. To enable the UART console, the following non-
+	  default option must be present in config.txt: enable_uart=1. This is
+	  required for U-Boot to operate correctly, even if you only care
+	  about the HDMI/usbkbd console.
+
+	  Due to hardware incompatibilities, this can't be used with
+	  BCM283/5/6/7.
+
+	  Also, due to a bug in firmware, switching to 64bit mode doesn't
+	  happen automatically based on the kernel's image filename. See
+	  https://github.com/raspberrypi/firmware/issues/1193 for more details.
+	  Until that is resolved, the configuration (config.txt) needs to
+	  explicitly set: arm_64bit=1.
+
+	  This option creates a build targeting the ARMv8/AArch64 ISA.
+	select BCM2711_64B
+
 endchoice
 
 config SYS_BOARD
@@ -141,4 +202,10 @@ config SYS_SOC
 config SYS_CONFIG_NAME
 	default "rpi"
 
+config BCM283x_BASE
+	hex
+	default "0x20000000" if BCM2835
+	default "0x3f000000" if BCM2836 || BCM2837
+	default "0xfe000000" if BCM2711
+
 endmenu
diff --git a/arch/arm/mach-bcm283x/include/mach/mbox.h b/arch/arm/mach-bcm283x/include/mach/mbox.h
index e3a893e49cf..0b6c2543d51 100644
--- a/arch/arm/mach-bcm283x/include/mach/mbox.h
+++ b/arch/arm/mach-bcm283x/include/mach/mbox.h
@@ -37,18 +37,17 @@
 
 /* Raw mailbox HW */
 
-#ifndef CONFIG_BCM2835
-#define BCM2835_MBOX_PHYSADDR	0x3f00b880
-#else
-#define BCM2835_MBOX_PHYSADDR	0x2000b880
-#endif
+#define BCM2835_MBOX_PHYSADDR	(CONFIG_BCM283x_BASE + 0x0000b880)
 
 struct bcm2835_mbox_regs {
 	u32 read;
 	u32 rsvd0[5];
-	u32 status;
-	u32 config;
+	u32 mail0_status;
+	u32 mail0_config;
 	u32 write;
+	u32 rsvd1[5];
+	u32 mail1_status;
+	u32 mail1_config;
 };
 
 #define BCM2835_MBOX_STATUS_WR_FULL	0x80000000
@@ -234,6 +233,7 @@ struct bcm2835_mbox_tag_set_power_state {
 #define BCM2835_MBOX_CLOCK_ID_SDRAM	8
 #define BCM2835_MBOX_CLOCK_ID_PIXEL	9
 #define BCM2835_MBOX_CLOCK_ID_PWM	10
+#define BCM2835_MBOX_CLOCK_ID_EMMC2	12
 
 struct bcm2835_mbox_tag_get_clock_rate {
 	struct bcm2835_mbox_tag_hdr tag_hdr;
diff --git a/arch/arm/mach-bcm283x/include/mach/sdhci.h b/arch/arm/mach-bcm283x/include/mach/sdhci.h
index 5cb6ec3340a..b443c379d8c 100644
--- a/arch/arm/mach-bcm283x/include/mach/sdhci.h
+++ b/arch/arm/mach-bcm283x/include/mach/sdhci.h
@@ -6,11 +6,7 @@
 #ifndef _BCM2835_SDHCI_H_
 #define _BCM2835_SDHCI_H_
 
-#ifndef CONFIG_BCM2835
-#define BCM2835_SDHCI_BASE 0x3f300000
-#else
-#define BCM2835_SDHCI_BASE 0x20300000
-#endif
+#define BCM2835_SDHCI_BASE (CONFIG_BCM283x_BASE + 0x00300000)
 
 int bcm2835_sdhci_init(u32 regbase, u32 emmc_freq);
 
diff --git a/arch/arm/mach-bcm283x/include/mach/timer.h b/arch/arm/mach-bcm283x/include/mach/timer.h
index 56b0c356bb4..014355e759a 100644
--- a/arch/arm/mach-bcm283x/include/mach/timer.h
+++ b/arch/arm/mach-bcm283x/include/mach/timer.h
@@ -6,11 +6,7 @@
 #ifndef _BCM2835_TIMER_H
 #define _BCM2835_TIMER_H
 
-#ifndef CONFIG_BCM2835
-#define BCM2835_TIMER_PHYSADDR	0x3f003000
-#else
-#define BCM2835_TIMER_PHYSADDR	0x20003000
-#endif
+#define BCM2835_TIMER_PHYSADDR	(CONFIG_BCM283x_BASE + 0x00003000)
 
 #define BCM2835_TIMER_CS_M3	(1 << 3)
 #define BCM2835_TIMER_CS_M2	(1 << 2)
diff --git a/arch/arm/mach-bcm283x/include/mach/wdog.h b/arch/arm/mach-bcm283x/include/mach/wdog.h
index 99c88e5df71..8292b3cf1f7 100644
--- a/arch/arm/mach-bcm283x/include/mach/wdog.h
+++ b/arch/arm/mach-bcm283x/include/mach/wdog.h
@@ -6,11 +6,7 @@
 #ifndef _BCM2835_WDOG_H
 #define _BCM2835_WDOG_H
 
-#ifndef CONFIG_BCM2835
-#define BCM2835_WDOG_PHYSADDR			0x3f100000
-#else
-#define BCM2835_WDOG_PHYSADDR			0x20100000
-#endif
+#define BCM2835_WDOG_PHYSADDR	(CONFIG_BCM283x_BASE + 0x00100000)
 
 struct bcm2835_wdog_regs {
 	u32 unknown0[7];
diff --git a/arch/arm/mach-bcm283x/mbox.c b/arch/arm/mach-bcm283x/mbox.c
index 1642ebd1031..3c67f68c178 100644
--- a/arch/arm/mach-bcm283x/mbox.c
+++ b/arch/arm/mach-bcm283x/mbox.c
@@ -27,7 +27,7 @@ int bcm2835_mbox_call_raw(u32 chan, u32 send, u32 *recv)
 	/* Drain any stale responses */
 
 	for (;;) {
-		val = readl(&regs->status);
+		val = readl(&regs->mail0_status);
 		if (val & BCM2835_MBOX_STATUS_RD_EMPTY)
 			break;
 		if (get_timer(0) >= endtime) {
@@ -40,7 +40,7 @@ int bcm2835_mbox_call_raw(u32 chan, u32 send, u32 *recv)
 	/* Wait for space to send */
 
 	for (;;) {
-		val = readl(&regs->status);
+		val = readl(&regs->mail1_status);
 		if (!(val & BCM2835_MBOX_STATUS_WR_FULL))
 			break;
 		if (get_timer(0) >= endtime) {
@@ -58,7 +58,7 @@ int bcm2835_mbox_call_raw(u32 chan, u32 send, u32 *recv)
 	/* Wait for the response */
 
 	for (;;) {
-		val = readl(&regs->status);
+		val = readl(&regs->mail0_status);
 		if (!(val & BCM2835_MBOX_STATUS_RD_EMPTY))
 			break;
 		if (get_timer(0) >= endtime) {