ARM: uniphier: split out UMC clock enable

The clock enable bits for UMC are more SoC-specific than for
the other hardware blocks.  Separate the UMC clocks and the other
clocks for better code reuse across SoCs.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

8 files changed, 73 insertions, 56 deletions

diff --git a/arch/arm/mach-uniphier/clk/Makefile b/arch/arm/mach-uniphier/clk/Makefile
index 95f433e87d..765660f875 100644
--- a/arch/arm/mach-uniphier/clk/Makefile
+++ b/arch/arm/mach-uniphier/clk/Makefile
@@ -4,15 +4,15 @@
 
 ifdef CONFIG_SPL_BUILD
 
-obj-$(CONFIG_ARCH_UNIPHIER_SLD3)	+= early-clk-ld4.o dpll-sld3.o
-obj-$(CONFIG_ARCH_UNIPHIER_LD4)		+= early-clk-ld4.o dpll-ld4.o
-obj-$(CONFIG_ARCH_UNIPHIER_PRO4)	+= early-clk-ld4.o dpll-pro4.o
-obj-$(CONFIG_ARCH_UNIPHIER_SLD8)	+= early-clk-ld4.o dpll-sld8.o
-obj-$(CONFIG_ARCH_UNIPHIER_PRO5)	+= early-clk-pro5.o
-obj-$(CONFIG_ARCH_UNIPHIER_PXS2)	+= early-clk-pxs2.o
-obj-$(CONFIG_ARCH_UNIPHIER_LD6B)	+= early-clk-pxs2.o
-obj-$(CONFIG_ARCH_UNIPHIER_LD11)	+= early-clk-ld11.o dpll-ld11.o
-obj-$(CONFIG_ARCH_UNIPHIER_LD20)	+= early-clk-ld20.o dpll-ld20.o
+obj-$(CONFIG_ARCH_UNIPHIER_SLD3)	+= clk-early-sld3.o clk-dram-sld3.o dpll-sld3.o
+obj-$(CONFIG_ARCH_UNIPHIER_LD4)		+= clk-early-sld3.o clk-dram-sld3.o dpll-ld4.o
+obj-$(CONFIG_ARCH_UNIPHIER_PRO4)	+= clk-early-sld3.o clk-dram-sld3.o dpll-pro4.o
+obj-$(CONFIG_ARCH_UNIPHIER_SLD8)	+= clk-early-sld3.o clk-dram-sld3.o dpll-sld8.o
+obj-$(CONFIG_ARCH_UNIPHIER_PRO5)	+= clk-early-sld3.o clk-dram-pro5.o
+obj-$(CONFIG_ARCH_UNIPHIER_PXS2)	+= clk-early-sld3.o clk-dram-pxs2.o
+obj-$(CONFIG_ARCH_UNIPHIER_LD6B)	+= clk-early-sld3.o clk-dram-pxs2.o
+obj-$(CONFIG_ARCH_UNIPHIER_LD11)	+= clk-early-ld11.o clk-dram-ld11.o dpll-ld11.o
+obj-$(CONFIG_ARCH_UNIPHIER_LD20)	+= clk-early-ld11.o clk-dram-ld20.o dpll-ld20.o
 
 else
 
diff --git a/arch/arm/mach-uniphier/clk/early-clk-ld11.c b/arch/arm/mach-uniphier/clk/clk-dram-ld11.c
index c94d83c4ed..593e11a292 100644
--- a/arch/arm/mach-uniphier/clk/early-clk-ld11.c
+++ b/arch/arm/mach-uniphier/clk/clk-dram-ld11.c
@@ -1,6 +1,5 @@
 /*
- * Copyright (C) 2016 Socionext Inc.
- *   Author: Masahiro Yamada <yamada.masahiro@socionext.com>
+ * Copyright (C) 2016-2017 Socionext Inc.
  *
  * SPDX-License-Identifier:	GPL-2.0+
  */
@@ -10,7 +9,7 @@
 #include "../init.h"
 #include "../sc64-regs.h"
 
-int uniphier_ld11_early_clk_init(const struct uniphier_board_data *bd)
+void uniphier_ld11_dram_clk_init(void)
 {
 	u32 tmp;
 
@@ -20,13 +19,7 @@ int uniphier_ld11_early_clk_init(const struct uniphier_board_data *bd)
 	writel(tmp, SC_RSTCTRL7);
 
 	/* provide clocks */
-	tmp = readl(SC_CLKCTRL4);
-	tmp |= SC_CLKCTRL4_PERI;
-	writel(tmp, SC_CLKCTRL4);
-
 	tmp = readl(SC_CLKCTRL7);
 	tmp |= SC_CLKCTRL7_UMC31 | SC_CLKCTRL7_UMC30;
 	writel(tmp, SC_CLKCTRL7);
-
-	return 0;
 }
diff --git a/arch/arm/mach-uniphier/clk/early-clk-ld20.c b/arch/arm/mach-uniphier/clk/clk-dram-ld20.c
index 5201a55940..62e5acd64d 100644
--- a/arch/arm/mach-uniphier/clk/early-clk-ld20.c
+++ b/arch/arm/mach-uniphier/clk/clk-dram-ld20.c
@@ -1,5 +1,5 @@
 /*
- * Copyright (C) 2016 Masahiro Yamada <yamada.masahiro@socionext.com>
+ * Copyright (C) 2016-2017 Socionext Inc.
  *
  * SPDX-License-Identifier:	GPL-2.0+
  */
@@ -9,7 +9,7 @@
 #include "../init.h"
 #include "../sc64-regs.h"
 
-int uniphier_ld20_early_clk_init(const struct uniphier_board_data *bd)
+void uniphier_ld20_dram_clk_init(void)
 {
 	u32 tmp;
 
@@ -21,14 +21,8 @@ int uniphier_ld20_early_clk_init(const struct uniphier_board_data *bd)
 	writel(tmp, SC_RSTCTRL7);
 
 	/* provide clocks */
-	tmp = readl(SC_CLKCTRL4);
-	tmp |= SC_CLKCTRL4_PERI;
-	writel(tmp, SC_CLKCTRL4);
-
 	tmp = readl(SC_CLKCTRL7);
 	tmp |= SC_CLKCTRL7_UMCSB | SC_CLKCTRL7_UMC32 | SC_CLKCTRL7_UMC31 |
 							SC_CLKCTRL7_UMC30;
 	writel(tmp, SC_CLKCTRL7);
-
-	return 0;
 }
diff --git a/arch/arm/mach-uniphier/clk/early-clk-pro5.c b/arch/arm/mach-uniphier/clk/clk-dram-pro5.c
index c41a8ead2e..1edc85a2f7 100644
--- a/arch/arm/mach-uniphier/clk/early-clk-pro5.c
+++ b/arch/arm/mach-uniphier/clk/clk-dram-pro5.c
@@ -1,5 +1,5 @@
 /*
- * Copyright (C) 2015 Masahiro Yamada <yamada.m@jp.panasonic.com>
+ * Copyright (C) 2015-2017 Socionext Inc.
  *
  * SPDX-License-Identifier:	GPL-2.0+
  */
@@ -9,7 +9,7 @@
 #include "../init.h"
 #include "../sc-regs.h"
 
-int uniphier_pro5_early_clk_init(const struct uniphier_board_data *bd)
+void uniphier_pro5_dram_clk_init(void)
 {
 	u32 tmp;
 
@@ -24,17 +24,12 @@ int uniphier_pro5_early_clk_init(const struct uniphier_board_data *bd)
 	       SC_RSTCTRL4_NRST_UMCA1 | SC_RSTCTRL4_NRST_UMCA0 |
 	       SC_RSTCTRL4_NRST_UMC31 | SC_RSTCTRL4_NRST_UMC30;
 	writel(tmp, SC_RSTCTRL4);
-	readl(SC_RSTCTRL); /* dummy read */
+	readl(SC_RSTCTRL4); /* dummy read */
 
 	/* provide clocks */
-	tmp = readl(SC_CLKCTRL);
-	tmp |= SC_CLKCTRL_CEN_SBC | SC_CLKCTRL_CEN_PERI;
-	writel(tmp, SC_CLKCTRL);
 	tmp = readl(SC_CLKCTRL4);
 	tmp |= SC_CLKCTRL4_CEN_UMCSB | SC_CLKCTRL4_CEN_UMC1 |
 	       SC_CLKCTRL4_CEN_UMC0;
 	writel(tmp, SC_CLKCTRL4);
 	readl(SC_CLKCTRL4); /* dummy read */
-
-	return 0;
 }
diff --git a/arch/arm/mach-uniphier/clk/early-clk-pxs2.c b/arch/arm/mach-uniphier/clk/clk-dram-pxs2.c
index 665ecd510f..75eaab7d29 100644
--- a/arch/arm/mach-uniphier/clk/early-clk-pxs2.c
+++ b/arch/arm/mach-uniphier/clk/clk-dram-pxs2.c
@@ -1,5 +1,5 @@
 /*
- * Copyright (C) 2015 Masahiro Yamada <yamada.masahiro@socionext.com>
+ * Copyright (C) 2016-2017 Socionext Inc.
  *
  * SPDX-License-Identifier:	GPL-2.0+
  */
@@ -11,17 +11,11 @@
 #include "../init.h"
 #include "../sc-regs.h"
 
-int uniphier_pxs2_early_clk_init(const struct uniphier_board_data *bd)
+void uniphier_pxs2_dram_clk_init(void)
 {
 	u32 tmp;
 
 	/* deassert reset */
-	if (spl_boot_device() != BOOT_DEVICE_NAND) {
-		tmp = readl(SC_RSTCTRL);
-		tmp &= ~SC_RSTCTRL_NRST_NAND;
-		writel(tmp, SC_RSTCTRL);
-	};
-
 	tmp = readl(SC_RSTCTRL4);
 	tmp |= SC_RSTCTRL4_NRST_UMCSB | SC_RSTCTRL4_NRST_UMCA2 |
 	       SC_RSTCTRL4_NRST_UMCA1 | SC_RSTCTRL4_NRST_UMCA0 |
@@ -31,15 +25,9 @@ int uniphier_pxs2_early_clk_init(const struct uniphier_board_data *bd)
 	readl(SC_RSTCTRL4); /* dummy read */
 
 	/* provide clocks */
-	tmp = readl(SC_CLKCTRL);
-	tmp |= SC_CLKCTRL_CEN_SBC | SC_CLKCTRL_CEN_PERI;
-	writel(tmp, SC_CLKCTRL);
-
 	tmp = readl(SC_CLKCTRL4);
 	tmp |= SC_CLKCTRL4_CEN_UMCSB | SC_CLKCTRL4_CEN_UMC2 |
 	       SC_CLKCTRL4_CEN_UMC1 | SC_CLKCTRL4_CEN_UMC0;
 	writel(tmp, SC_CLKCTRL4);
 	readl(SC_CLKCTRL4); /* dummy read */
-
-	return 0;
 }
diff --git a/arch/arm/mach-uniphier/clk/early-clk-ld4.c b/arch/arm/mach-uniphier/clk/clk-dram-sld3.c
index b6e8b646f9..3430303f87 100644
--- a/arch/arm/mach-uniphier/clk/early-clk-ld4.c
+++ b/arch/arm/mach-uniphier/clk/clk-dram-sld3.c
@@ -1,5 +1,6 @@
 /*
- * Copyright (C) 2011-2015 Masahiro Yamada <yamada.m@jp.panasonic.com>
+ * Copyright (C) 2011-2014 Panasonic Corporation
+ * Copyright (C) 2015-2017 Socionext Inc.
  *
  * SPDX-License-Identifier:	GPL-2.0+
  */
@@ -11,24 +12,19 @@
 #include "../init.h"
 #include "../sc-regs.h"
 
-int uniphier_ld4_early_clk_init(const struct uniphier_board_data *bd)
+void uniphier_sld3_dram_clk_init(void)
 {
 	u32 tmp;
 
 	/* deassert reset */
 	tmp = readl(SC_RSTCTRL);
-
 	tmp |= SC_RSTCTRL_NRST_UMC1 | SC_RSTCTRL_NRST_UMC0;
-	if (spl_boot_device() != BOOT_DEVICE_NAND)
-		tmp &= ~SC_RSTCTRL_NRST_NAND;
 	writel(tmp, SC_RSTCTRL);
 	readl(SC_RSTCTRL); /* dummy read */
 
 	/* provide clocks */
 	tmp = readl(SC_CLKCTRL);
-	tmp |= SC_CLKCTRL_CEN_UMC | SC_CLKCTRL_CEN_SBC | SC_CLKCTRL_CEN_PERI;
+	tmp |= SC_CLKCTRL_CEN_UMC;
 	writel(tmp, SC_CLKCTRL);
 	readl(SC_CLKCTRL); /* dummy read */
-
-	return 0;
 }
diff --git a/arch/arm/mach-uniphier/clk/clk-early-ld11.c b/arch/arm/mach-uniphier/clk/clk-early-ld11.c
new file mode 100644
index 0000000000..bb6f7a47cb
--- /dev/null
+++ b/arch/arm/mach-uniphier/clk/clk-early-ld11.c
@@ -0,0 +1,20 @@
+/*
+ * Copyright (C) 2016-2017 Socionext Inc.
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <linux/io.h>
+
+#include "../init.h"
+#include "../sc64-regs.h"
+
+void uniphier_ld11_early_clk_init(void)
+{
+	u32 tmp;
+
+	/* provide clocks */
+	tmp = readl(SC_CLKCTRL4);
+	tmp |= SC_CLKCTRL4_PERI;
+	writel(tmp, SC_CLKCTRL4);
+}
diff --git a/arch/arm/mach-uniphier/clk/clk-early-sld3.c b/arch/arm/mach-uniphier/clk/clk-early-sld3.c
new file mode 100644
index 0000000000..3235da20bc
--- /dev/null
+++ b/arch/arm/mach-uniphier/clk/clk-early-sld3.c
@@ -0,0 +1,31 @@
+/*
+ * Copyright (C) 2011-2014 Panasonic Corporation
+ * Copyright (C) 2015-2017 Socionext Inc.
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <common.h>
+#include <spl.h>
+#include <linux/io.h>
+
+#include "../init.h"
+#include "../sc-regs.h"
+
+void uniphier_sld3_early_clk_init(void)
+{
+	u32 tmp;
+
+	/* deassert reset */
+	if (spl_boot_device() != BOOT_DEVICE_NAND) {
+		tmp = readl(SC_RSTCTRL);
+		tmp &= ~SC_RSTCTRL_NRST_NAND;
+		writel(tmp, SC_RSTCTRL);
+	};
+
+	/* provide clocks */
+	tmp = readl(SC_CLKCTRL);
+	tmp |= SC_CLKCTRL_CEN_SBC | SC_CLKCTRL_CEN_PERI;
+	writel(tmp, SC_CLKCTRL);
+	readl(SC_CLKCTRL); /* dummy read */
+}